# This is a Key In Net List file for # the ADF-2 for the Run IIB Cal Trig # Power Entry and DC/DC Converter Nets # ----------------------------------------- # Original Rev. 22-MAR-2004 # Most Recent Rev. 4-NOV-2004 # This file includes all the nets that bring the power supply voltages # on to the card and make them available to the ADF-2 circuits. The # second half of this file is the two DC/DC Converters that make the # 3.3 Volt VDD_LOGIC supply and the 1.5 Volt VCCINT FPGA Core supply. # This file contains the nets for the following components: # # F1301:F1304 Fuse: Littelfuse 3 Amp Slow Blow # # D1301:D1304 Transient Voltage Suppressor OnSemi 1SMA5.0AT3 # # C1301:C1304 470 uFd 16 Volt Aluminum Electrolytic # # C1321:C1323 150 uFd 10 Volt Tantalum Capacitor # C1331:C1333 150 uFd 10 Volt Tantalum Capacitor # # R1321, R1331 150 Ohm 0603 resistors # # U1321 1.5 Volt DC/DC Converter # U1331 3.3 Volt DC/DC Converter # # # Auxiliary Ceranic ByPass Capacitors # associated with the DC-DC Converters. # # C1561:C1564 0.1 uFd Ceramic 0603 VCC_LOGIC # C1565:C1566 0.1 uFd Ceramic 0603 VDD_LOGIC # C1567:C1568 0.1 uFd Ceramic 0603 VCCINT # # C1571:C1574 0.047 uFd Ceramic 0603 VCC_LOGIC # C1575:C1576 0.047 uFd Ceramic 0603 VDD_LOGIC # C1577:C1578 0.047 uFd Ceramic 0603 VCCINT # # C1581:C1584 0.0047 uFd Ceramic 0603 VCC_LOGIC # C1585:C1586 0.0047 uFd Ceramic 0603 VDD_LOGIC # C1587:C1588 0.0047 uFd Ceramic 0603 VCCINT # # # Auxiliary Ceranic ByPass Capacitors # associated with the VDD_LOGIC and VCCINT distribution. # These auxiliary bypass capacitors are included in this # net list file. # # C1601 0.1 uFd VCCINT S.E of U801 Bot # # C1611 0.1 uFd VDD_LOGIC N.W. of BC PAL Bot # C1612 0.1 uFd VDD_LOGIC W. of Pow Super Bot # C1613 0.1 uFd VDD_LOGIC Under U1203 Bot # # C1621 4.7 nFd VDD_LOGIC N.W. of BC PAL Top # C1622 4.7 nFd VDD_LOGIC N.E. of BC PAL Top # C1623 4.7 nFd VDD_LOGIC W. of Pow Super Top # C1624 4.7 nFd VDD_LOGIC W. of Pow Super Top # C1625 4.7 nFd VDD_LOGIC Above Chan Link Top # C1626 4.7 nFd VDD_LOGIC Above Chan Link Top # C1627 4.7 nFd VDD_LOGIC Under U1203 Bot # # # There are 5 via's that are tied to GND and used if a # GND connection is needed during testing. # # V1301:V1305 wrap_0_6_mm 0.6 mm finished hole via # # The ADF-2 card brings in 4 supply voltages from the VME backplane. # These 4 supplies are: # # # VME_P12V This is the VME power distribution bus that normally # carries +12 Volts. This supply enters the ADF-2 card # on pin P1-C31. In the ADF-2 crates this bus will # carry the Analog +5 Volt supply. This supply is used # by the analog front-end differential amplifiers. After # the power entry section the Analog -5 Volt net is # named VCC_ANALOG. # # # VME_5V This is the VME power distribution bus that carries # +5 Volts. This supply enters the ADF-2 card on pins: # # P1-A32 P1-B32 P1-C32 P2-B1 P2-B13 P2-B32 # # After passing through the power entry fuse and filter, # the +5 Volt Logic supply has net name VCC_LOGIC. # On the ADF-2 this supply is used to power the following: # # Provide power for two VME backplane buffer driver # IC's U1021 and U1031. # # Provide power to the Power Up Supervisor U1351. # # Proide input power to the DC/DC Converter that makes # the +1.5 Volt FPGA Core Logic supply. On the ADF-2 # this +1.5 Volt Core supply has net name VCCINT. # # Proide input power to the DC/DC Converter that makes # the +3.3 Volt Logic supply. This +3.3 Logic supply # is used by the FPGA I/O Blocks, and for the FPGA # Auxiliary power, and by the other 3.3 Volt logic on # the ADF-2 card. On the ADF-2 card the +3.3 Logic # supply net is named VDD_LOGIC. # # # VME_3V3 This is the VME-64x power distribution bus that carries # +3.3 Volts. This supply enters the ADF-2 card on pins: # # P1- D12 D14 D16 D18 D20 D22 D24 D26 D28 D30 # # On the ADF-2 card this supply is used by # the high speed ADC's and the Pedestal DAC's. This # supply is only used in the analog front-end section of # the ADF-2. After the power entry section the Analog # +3.3 Volt net is named VDD_ANALOG. # # # VME_N12V This is the VME power distribution bus that normally # carries -12 Volts. This supply enters the ADF-2 card # on pin P1-A31. In the ADF-2 crates this bus will # carry the Analog -5 Volt supply. This supply is used # by the analog front-end differential amplifiers. After # the power entry section the Analog -5 Volt net is # named VEE_ANALOG. # The Power Entry Nets: # VME "+12 Volt" ADF-2 +5 Volt Analog Supply NET 'VME_P12V' F1301-2 # VME +12 Volt Bus Power # This is ADF-2 +5 Analog Supply NET 'VCC_ANALOG' F1301-1 D1301-1 C1301-1 # ADF-2 Analog +5 Volt Net NET 'GROUND' D1301-2 C1301-2 # VME "+5 Volt" ADF-2 +5 Volt Digital and DC/DC Converter Supply NET 'VME_5V' F1302-2 # VME +5 Volt Bus Power NET 'VCC_LOGIC' F1302-1 D1302-1 C1302-1 # ADF-2 Digital +5 Volt Net NET 'GROUND' D1302-2 C1302-2 # VME "+3.3 Volt" ADF-2 +3.3 Volt Analog Supply NET 'VME_3V3' F1303-2 # VME-64X +3.3 Volt Bus Power NET 'VDD_ANALOG' F1303-1 D1303-1 C1303-1 # ADF-2 Analog +3.3 Volt Net NET 'GROUND' D1303-2 C1303-2 # VME "-12 Volt" ADF-2 -5 Volt Analog Supply NET 'VME_N12V' F1304-2 # VME -12 Volt Bus Power # This is ADF-2 -5 Analog Supply NET 'VEE_ANALOG' F1304-1 D1304-2 C1304-2 # ADF-2 Analog -5 Volt Net NET 'GROUND' D1304-1 C1304-1 # ----- DC/DC Converters ----- # Nets for the 1.5 Volt DC/DC Converter NET 'VCC_LOGIC' C1321-1 U1321-2 # +5 V supply to the DC/DC Converter NET 'GROUND' C1321-2 # Gnd for the input filter capacitor NET 'GROUND' U1321-3 # Gnd pin on the DC/DC Converter NET 'VCCINT' U1321-4 C1322-1 # 1.5 V output from the DC/DC Convert NET 'GROUND' C1322-2 # Gnd for the output filter capacitor NET 'VCCINT' C1323-1 # Second VCCINT Tantalum filter NET 'GROUND' C1323-2 # capacitor near the FPGAs. NET 'VCCINT' U1321-6 # Feedback to the Sense input # of the DC/DC Converter # There is no connection to U1321 pin 5. It must float. # Nets for the 3.3 Volt DC/DC Converter NET 'VCC_LOGIC' C1331-1 U1331-2 # +5 V supply to the DC/DC Converter NET 'GROUND' C1331-2 # Gnd for the input filter capacitor NET 'GROUND' U1331-3 # Gnd pin on the DC/DC Converter NET 'VDD_LOGIC' U1331-4 C1332-1 # 3.3 V output from the DC/DC Convert NET 'GROUND' C1332-2 # Gnd for the output filter capacitor NET 'VDD_LOGIC' C1333-1 # Second VDD_LOGIC Tantalum filter NET 'GROUND' C1333-2 # capacitor near the FPGAs. NET 'VDD_LOGIC' U1331-6 # Feedback to the Sense input # of the DC/DC Converter # There is no connection to U1331 pin 5. It must float. # Common Enable Signal to both DC/DC Converters NET 'DC_DC_CONVERTER_ENABLE' R1321-1 R1331-1 # High --> Enable Signal # to the DC/DC Converter # isolation resistors # from the Supervisor. NET 'ENABLE_1V5_DC_CONVERTER' R1321-2 U1321-1 # High --> Enable to # the DC/DC Converter # for 1.5 Volts. NET 'ENABLE_3V3_DC_CONVERTER' R1331-2 U1331-1 # High --> Enable to # the DC/DC Converter # for 3.3 Volts. # Auxiliary Ceranic ByPass Capacitors # associated with the DC-DC Converters. # # C1561:C1564 0.1 uFd Ceramic 0603 VCC_LOGIC # C1565:C1566 0.1 uFd Ceramic 0603 VDD_LOGIC # C1567:C1568 0.1 uFd Ceramic 0603 VCCINT # # C1571:C1574 0.047 uFd Ceramic 0603 VCC_LOGIC # C1575:C1576 0.047 uFd Ceramic 0603 VDD_LOGIC # C1577:C1578 0.047 uFd Ceramic 0603 VCCINT # # C1581:C1584 0.0047 uFd Ceramic 0603 VCC_LOGIC # C1585:C1586 0.0047 uFd Ceramic 0603 VDD_LOGIC # C1587:C1588 0.0047 uFd Ceramic 0603 VCCINT # Auxiliary Ceranic ByPass Capacitors associated # with the VDDINT DC-DC Converter. NET 'VCC_LOGIC' C1561-1 C1562-1 C1571-2 C1572-2 C1581-1 C1582-1 NET 'GROUND' C1561-2 C1562-2 C1571-1 C1572-1 C1581-2 C1582-2 NET 'VCCINT' C1567-1 C1568-1 C1577-2 C1578-2 C1587-1 C1588-1 NET 'GROUND' C1567-2 C1568-2 C1577-1 C1578-1 C1587-2 C1588-2 # Auxiliary Ceranic ByPass Capacitors associated # with the VDD_LOGIC DC-DC Converter. NET 'VCC_LOGIC' C1563-1 C1564-1 C1573-2 C1574-2 C1583-1 C1584-1 NET 'GROUND' C1563-2 C1564-2 C1573-1 C1574-1 C1583-2 C1584-2 NET 'VDD_LOGIC' C1565-1 C1566-1 C1575-2 C1576-2 C1585-1 C1586-1 NET 'GROUND' C1565-2 C1566-2 C1575-1 C1576-1 C1585-2 C1586-2 # Auxiliary Ceranic ByPass Capacitors # associated with the VDD_LOGIC and VCCINT distribution. # # C1601 0.1 uFd VCCINT S.E of U801 Bot # # C1611 0.1 uFd VDD_LOGIC N.W. of BC PAL Bot # C1612 0.1 uFd VDD_LOGIC W. of Pow Super Bot # C1613 0.1 uFd VDD_LOGIC Under U1203 Bot # # C1621 4.7 nFd VDD_LOGIC N.W. of BC PAL Top # C1622 4.7 nFd VDD_LOGIC N.E. of BC PAL Top # C1623 4.7 nFd VDD_LOGIC W. of Pow Super Top # C1624 4.7 nFd VDD_LOGIC W. of Pow Super Top # C1625 4.7 nFd VDD_LOGIC Above Chan Link Top # C1626 4.7 nFd VDD_LOGIC Above Chan Link Top # C1627 4.7 nFd VDD_LOGIC Under U1203 Bot NET 'VCCINT' C1601-1 NET 'GROUND' C1601-2 NET 'VDD_LOGIC' C1611-1 C1612-1 C1613-1 NET 'GROUND' C1611-2 C1612-2 C1613-2 NET 'VDD_LOGIC' C1621-1 C1622-1 C1623-1 NET 'GROUND' C1621-2 C1622-2 C1623-2 NET 'VDD_LOGIC' C1624-1 C1625-1 C1626-1 C1627-1 NET 'GROUND' C1624-2 C1625-2 C1626-2 C1627-2 # There are 5 via's that are tied to GND and used if a # GND connection is needed during testing. # # V1301:V1305 wrap_0_6_mm 0.6 mm finished hole via NET 'GROUND' V1301-1 # Via tied to Ground. NET 'GROUND' V1302-1 # Via tied to Ground. NET 'GROUND' V1303-1 # Via tied to Ground. NET 'GROUND' V1304-1 # Via tied to Ground. NET 'GROUND' V1305-1 # Via tied to Ground.