-- PROJECT: D0 Run IIb Trigger L1 Calorimeter upgrade -- -- MODULE: RS232 to generic bus converter -- -- ELEMENT: interpret_char -- -- DESCRIPTION: Interpret individual ASCII characters de-serialized -- by rs232_deserializer block. Convert to hexadecimal the characters -- in the intervals 0 to 9 and A to F. -- -- AUTHOR: J.Marquet marquet@efrei.fr -- -- DATE AND HISTORY: -- July 2004: created -- September 2004: revised by D. Calvet -------------------------------------------------------------------------------- -------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; library work; use work.constant_package.all; -------------------------------------------------------------------------------- -- -- Character interpreter -- entity interpret_char is port ( -- -- General control signals -- RESET : in std_logic; -- Asynch. Reset CLK : in std_logic; -- Reference Clock -- -- Signals from RS232 de-serializer -- Q_IN : in std_logic_vector(7 downto 0); -- ASCII character input -- -- Signals for command line interpreter -- VALID : in std_logic; -- new character ready IS_SPACE : out std_logic; -- character is " " IS_I : out std_logic; -- character is "I" IS_R : out std_logic; -- character is "R" IS_W : out std_logic; -- character is "W" IS_Q : out std_logic; -- character is "Q" IS_CR : out std_logic; -- character is carriage return IS_LF : out std_logic; -- character is line feed IS_DIGIT : out std_logic; -- character is 0-9 or A-F IS_ERROR : out std_logic; -- character is none of above CODE_VALID : out std_logic; -- result ready CODE : out std_logic_vector(3 downto 0) -- binary value if 0-9 or A-F ); end interpret_char; architecture Behavioral of interpret_char is begin ------------------------------------------------------------------------------------------------ -- This process maps the ASCII code of the received character to the appropriate output ------------------------------------------------------------------------------------------------ process (RESET, CLK) begin if RESET = '1' then IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; elsif rising_edge(CLK) and VALID = '1' then case Q_IN is when ascii_I => IS_SPACE <= '0'; IS_I <= '1'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_R => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '1'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_W => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '1'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_space => IS_SPACE <= '1'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_Q => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '1'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_cr => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '1'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_lf => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '1'; IS_DIGIT <= '0'; IS_ERROR <= '0'; when ascii_0 | ascii_1 | ascii_2 | ascii_3 | ascii_4 | ascii_5 | ascii_6 | ascii_7 | ascii_8 | ascii_9 | ascii_A | ascii_B | ascii_C | ascii_D | ascii_E | ascii_F => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '1'; IS_ERROR <= '0'; when others => IS_SPACE <= '0'; IS_I <= '0'; IS_R <= '0'; IS_W <= '0'; IS_Q <= '0'; IS_CR <= '0'; IS_LF <= '0'; IS_DIGIT <= '0'; IS_ERROR <= '1'; end case; end if; end process ; --------------------------------------------------------------------------------------------------------- -- P1 generates the 4 bit value of the hexadecimal character received -- and indicate to the next block when a new character was interpreted --------------------------------------------------------------------------------------------------------- P1: process(RESET, CLK) begin if RESET = '1' then CODE <= (others => '0'); CODE_VALID <= '0'; elsif rising_edge(CLK) then CODE_VALID <= VALID; if Q_IN(7 downto 4) = "0100" and VALID = '1' then CODE <= '1'& (Q_IN(2 downto 0) + "001"); else CODE <= Q_IN(3 downto 0); end if; end if; end process P1; end behavioral;