-- PROJECT: D0 Run IIb Trigger L1 Calorimeter upgrade -- -- MODULE: Channel Link Receiver Test Card -- -- ELEMENT: acia_test -- -- DESCRIPTION: Testbench for the Channel Link -- Receiver Tester with control over RS232. -- -- AUTHOR: D. Calvet calvet@hep.saclay.cea.fr -- -- DATE AND HISTORY: -- April 2004: created -- -------------------------------------------------------------------------------- -------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_ARITH.all; use IEEE.STD_LOGIC_UNSIGNED.all; library work; use work.utility_pkg.all; -------------------------------------------------------------------------------- entity acia_test is end acia_test; architecture behavior of acia_test is -- -- Generic RS232 controller -- component acia generic ( TX_FIFO_SIZE : NATURAL := 4; RX_FIFO_SIZE : NATURAL := 4 ); port ( ----------------------------------------------------------------------- -- -- Miscellaneous signals -- RESET : in std_logic; -- RESET ----------------------------------------------------------------------- ----------------------------------------------------------------------- -- -- Local bus signals -- SPEED : in NATURAL; -- port speed TX_DATA : in std_logic_vector(7 downto 0); -- TX port TX_STROBE : in std_logic; -- TX strobe TX_READY : out std_logic; -- TX ready RX_DATA : out std_logic_vector(7 downto 0); -- RX port RX_STROBE : in std_logic; -- RX strobe RX_READY : out std_logic; -- RX ready ----------------------------------------------------------------------- ----------------------------------------------------------------------- -- -- RS232 signals -- TX_OUT : out std_logic; -- TX serial output RX_IN : in std_logic -- RX serial input ----------------------------------------------------------------------- ); end component; ----------------------------------------------------------------------- -- -- Miscellaneous signals -- signal RESET : std_logic := '0'; -- Register RESET ----------------------------------------------------------------------- ----------------------------------------------------------------------- -- -- ACIA Host bus signals -- signal HOST_RS232_SPEED : NATURAL:= 9600; -- Host RS232 port speed signal HOST_RS232_TX_DATA : std_logic_vector(7 downto 0); -- Host TX port signal HOST_RS232_TX_STROBE : std_logic; -- Host TX strobe signal HOST_RS232_TX_READY : std_logic := '1'; -- Host TX ready signal HOST_RS232_RX_DATA : std_logic_vector(7 downto 0):= "00001010"; -- Host RX port signal HOST_RS232_RX_STROBE : std_logic; -- Host RX strobe signal HOST_RS232_RX_READY : std_logic := '1'; -- Host RX ready ----------------------------------------------------------------------- ----------------------------------------------------------------------- -- -- RS232 Host signals -- signal HOST_RS232_TX_OUT : std_logic; signal HOST_RS232_RX_IN : std_logic; ----------------------------------------------------------------------- begin RESET <= '0' after 0 ns, '1' after 100 ns, '0' after 200 ns; -- -- Loop-back -- HOST_RS232_RX_IN <= transport HOST_RS232_TX_OUT after 1220 ns; -- -- Generic RS232 controller -- PC_ACIA: acia generic map( 4, 24 ) port map ( ----------------------------------------------------------------------- -- -- Miscellaneous signals -- RESET => RESET, ----------------------------------------------------------------------- ----------------------------------------------------------------------- -- -- Local bus signals -- SPEED => HOST_RS232_SPEED, TX_DATA => HOST_RS232_TX_DATA, TX_STROBE => HOST_RS232_TX_STROBE, TX_READY => HOST_RS232_TX_READY, RX_DATA => HOST_RS232_RX_DATA, RX_STROBE => HOST_RS232_RX_STROBE, RX_READY => HOST_RS232_RX_READY, ----------------------------------------------------------------------- ----------------------------------------------------------------------- -- -- RS232 signals -- TX_OUT => HOST_RS232_TX_OUT, RX_IN => HOST_RS232_RX_IN ----------------------------------------------------------------------- ); end behavior;