**************************************************************************** * * * Temp_3.ASM * * * * This is the program section for the first test program of DSP L15 Cal * * Trig filtering. * * * * First we will scan through the Trigger Towers that this DSP Node is * * responsible for (i.e. eta's n+2,n+3,n+4,n+5) and look for Trigger * * Towers that are above the L15 Ref Set. * * * * When we find a Trig Tower above its entry in the L15 Ref Set we will * * set a bit in a mask and then branch immediately to the L15 algorithm * * processing before finishing the scan for Trig Towers above the L15 * * Ref Set. This is because we do not want to have to scan through the * * mask to see where in eta and phi to run the L15 algorithm because it * * will take almost as long to scan the mask as it took to build it in * * the first place. * * * * The L1 rack data and the L15 Ref Set data in loaded via an include * * file. The layout of this data is explained in the include file. It * * is stored in internal memory B3 and can thus be used with either * * CONF 1 or CONF 2. * * * * When a tower is found above L15 Ref Set then a routine is called * * to execute the L15 Algorithm. There are 4 versions of this * * algorithm stored in program memory. They differ only in the details * * of their "hard wired" addressing (i.e. was the Trigger Tower above * * the L15 Ref Set an eta n+2, n+3, n+4, or n+5 tower). * * * * Recall the arrangement of eta's in the racks: * * * * Rack Rack #1 Rack #2 * * Signal -------------------- -------------------- * * Names n n+1 n+2 n+3 n n+2 n+3 n+7 * * * * This DSP Node ------------------------- * * is Responsible n+2 n+3 n+4 n+5 * * for these eta's * * * * * **************************************************************************** .Text ; Make this a Program Section. .PS 0fb00h ; Set the Prog Sect address i.e. right ; after the DSKD monitor. .Entry ; Declare this the entry point. Cnst2 .Set 0002h ; The value 2 is loaded into AR0 so ; that AR0 may be used to "double ; increment" other Auxiliary Registers ; by using "*0+" addressing. Rk1Data .Set 0600h ; The beginning address of Rack 1 Data. Rk2Data .Set 0640h ; The beginning address of Rack 2 Data. RS1Data .Set 0680h ; The beginning address of Rack 1 ; L15 Reference Set data. RS2Data .Set 0700h ; The beginning address of Rack 2 ; L15 Reference Set data. PhiCnt .Set 0031 ; This this the number of loops to make ; through the Phi Index in order to ; have loop through all of the phi's ; looking for Trigger Towers above ; the L15 Reference Set. Because of ; the BANZ instruction this will run ; through the eta loop 32 times. BegInt: CONF 1 ; B0 is Program Space $FA00:$FBFF ; B1 is Data Space $0400:$05FF ; B2 is Data Space $0060:$007F ; B3 is Data Space $0600:$07FF IntStr: LRLK AR0,Cnst2 ; Aux Reg 0 will be used for *0+ adrsing. LRLK AR1,Rk1Data ; Aux Reg 1 points to Rack 1 data. LRLK AR2,Rk2Data ; Aux Reg 2 points to Rack 2 data. LRLK AR3,RS1Data ; Aux Reg 3 points to Rack 1 L15 Ref Set. LRLK AR4,RS2Data ; Aux Reg 4 points to Rack 2 L15 Ref Set. ; Move the pointer for Rack 1 and 2 to ; skip over eta's n and n+1 for both ; the rack data and the Ref Set data. LARP AR1 ; Select Aux Reg 1, i.e. Rack 1 data. ADRK 1 ; Skip Rack 1 data for eta n and n+1. LARP AR3 ; Select Aux Reg 3, i.e. Ref Set Rack 1. ADRK 2 ; Skip Ref Set 1 data for eta n and n+1. LARP AR2 ; Select Aux Reg 2, i.e. Rack 2 data. ADRK 1 ; Skip Rack 2 data for eta n and n+1. LARP AR4 ; Select Aux Reg 4, i.e. Ref Set Rack 2. ADRK 2 ; Skip Ref Set 2 data for eta n and n+1. LDPK 8 ; Select Data Page #8 i.e. adrs 400h. StrPhi: LRLK AR5,PhiCnt ; Aux Reg 5 will be the loop counter for ; running through all 32 phi's. LARP AR1 ; Select Aux Reg 1, i.e. Rack 1 data. ; Everything is now set for looping over ; all 32 phi's looking for Trigger Towers ; that are above the L15 Ref Set. Loop1: LAC *,0,AR3 ; Load Rack 1 data for eta's n+2 and n+3 ; Set ARP=3 i.e. select Rack 1 Ref Set ; data. Do not left shift of the data. AND LowByt ; Mask the high byte i.e. keep eta n+2. SUB *+,0,AR1 ; Subtract the Ref Set data for eta n+2. ; Increment the Ref Set data pointer. ; Do not shift the Ref Set data. ; Set ARP=1 i.e. select Rack 1 data. BLZ NxTst3 ; If Tower n+2 was not above threshold ; then the next test is tower n+3. CALL HotN2 ; Call the routine for the L15 algorithm ; for an eta n+2 Trigger Tower above ; l15 Ref Set. NxTst3: LAC *0+,0,AR3 ; Load Rack 1 data for eta's n+2 and n+3. ; Set ARP=3 i.e. select Rack 1 Ref Set ; data. Do not left shift of the data. ; Add 2 to the Rack 1 data pointer. AND HiByte ; Mask the low byte i.e. keep eta n+3. SUB *0+,0,AR3 ; Subtract the Ref Set data for eta n+3. ; Add 2 to the Ref Set data pointer. ; Do not shift the Ref Set data. ; Keep ARP=3 i.e. select Rack 1 Ref ; Set data. BLZ NxTst4 ; If Tower n+3 was not above threshold ; then the next test is tower n+4. CALL HotN3 ; Call the routine for the L15 algorithm ; for an eta n+3 Trigger Tower above ; l15 Ref Set. NxTst4: SUB *+,0,AR2 ; This SUB is just a fast way to ; increment the pointer to the Rack 1 ; Ref Set data i.e. now it points to ; the next phi eta n+2. ; Set ARP=2 i.e. select Rack 2 data. ; Now do the 2 eta's from the second ; rack before switching to the next ; higher Phi Index. LAC *,0,AR4 ; Load Rack 2 data for eta's n+2 and n+3 ; Set ARP=4 i.e. select Rack 2 Ref Set ; data. Do not left shift of the data. AND LowByt ; Mask the high byte i.e. keep eta n+2. SUB *+,0,AR2 ; Subtract the Ref Set data for eta n+2. ; Increment the Ref Set data pointer. ; Do not shift the Ref Set data. ; Set ARP=2 i.e. select Rack 2 data. BLZ NxTst5 ; If Tower n+4 was not above threshold ; then the next test is tower n+5. CALL HotN4 ; Call the routine for the L15 algorithm ; for an eta n+4 Trigger Tower above ; l15 Ref Set. NxTst5: LAC *0+,0,AR4 ; Load Rack 2 data for eta's n+2 and n+3. ; Set ARP=4 i.e. select Rack 2 Ref Set ; data. Do not left shift of the data. ; Add 2 to the Rack 2 data pointer. AND HiByte ; Mask the low byte i.e. keep eta n+3. SUB *0+,0,AR4 ; Subtract the Ref Set data for eta n+3. ; Add 2 to the Ref Set data pointer. ; Do not shift the Ref Set data. ; Keep ARP=4 i.e. Rack 2 Ref Set data. BLZ NxTst2 ; If Tower n+5 was not above threshold ; then the next test is tower n+2. CALL HotN5 ; Call the routine for the L15 algorithm ; for an eta n+5 Trigger Tower above ; l15 Ref Set. NxTst2: SUB *+,0,AR5 ; This SUB is just a fast way to ; increment the pointer to the Rack 2 ; Ref Set data i.e. now it points to ; the next phi eta n+2. ; Set ARP=5 i.e. select the Aux Reg ; for the phi loop counter. BANZ Loop1,*-,AR1 ; Test to see if we have looked at all ; 32 phi's. Set ARP=1 to select the ; Rack 1 data. ; We exit via the BANZ instruction when ; all 32 phi's have been scanned. The ; next instruction will be the first ; one to execute after scanning all ; 32 phi's for Trigger Towers above ; the L15 Reference Set. IN 10,PA3 ; Read Port Address 1 and store it in ; address $0410. We are currently on ; data memory page 8 so all is OK. ; This is just to make a wire wiggle ; outside of the chip. LARP AR5 ; Select Aux Reg 5. This is the phi ; loop control register which will ; need to be initialized again before ; starting the phi loop again. B IntStr ; Jump to the start of the Phi Loop Idle HotN2: Idle HotN3: Idle HotN4: Idle HotN5: Idle .Data ; Declare a Data Memory Program Section. .DS 0400h ; Set the Data Memory Address at the ; beginning of internal memory B1. LowByt: .Word 00FFh ; Mask for the lower byte. HiByte: .Word 0FF00h ; Mask for the upper byte. .ListOff .Include "TempX2.ASM" ; Get the Rack and L15 Ref Set data. .ListOn .End