
Cyclic   IDNT                            ; Title of  Cyclic Section

         SECTION   Sect_Cyclic,4,C       ; Declare a noncommon code section.
                                         ; Align to Longwords.

***************************************************************************
*                                                                         *
*   Cyclic   Event by Event Processing                 Rev. 21-NOV-1992   *
*                                                                         *
***************************************************************************

***************************************************************************
*                                                                         *
*  Cyclic Operation section.                                              *
*     Zero the loop counter that times the wait for finding either        *
*        Start Jet List or else Slave Ready.                              *
*                                                                         *
*     Wait for either the Start Jet List signal or else the Slave Ready   *
*        signal from the COMINT and verify and verify their state.        *
*        If it takes too long (e.g. > 2 min) then: pulse Data Cable       *
*        Driver Finished line to help "clear" the COMINT card,  Set       *
*        the TWB that says no Slave Ready seen, and put a warning         *
*        message on the 68k console.                                      *
*        While waiting for Slave Ready pulse the 68k running OK line      *
*        to keep the VME NOT Running TWB from becoming active.            *
*                                                                         *
*     Once either Start Jet List or else Slave Ready is received:         *
*        If Slave Ready is set then exit the state called StateWaitSvRd   *
*        and enter the StateRun68k.  IF just the State Jet List signal    *
*        is received, as should be the case, then stay in the state       *
*        called StateWaitSvRd.                                            *
*        Call the routine to read the Absolute Time data.                 *
*        Call the Subroutine to read the Calorimeter Pulser Programming   *
*           Data and the Central Detector Pulser Programming Data.        *
*                                                                         *
*     Zero the loop counter that times the wait for Slave Ready.          *
*     Wait for the Slave Ready signal from the COMINT and verify          *
*        that Slave Ready is HIGH.  If it takes too long (e.g.            *
*        > 1/2 sec ) then: pulse Data Cable Driver Finished to            *
*        "clear" the COMINT card, Set the TWB that says no Slave          *
*        Ready seen, and put a warning message on the 68k console.        *
*        While waiting for Slave Ready pulse the 68k running OK line      *
*        to keep the VME NOT Running TWB from becoming active.            *
*                                                                         *
*     Once Slave Ready is received:                                       *
*     Increment the Buffer Select Counter so that the least               *
*        recently used VBD Buffer will be tested first to see             *
*        if it is free.                                                   *
*                                                                         *
*     Read the Specific Triggers Fired and make a Specific Triggers       *
*        Fired list in a longword. Based on which Spec Trig's have        *
*        fired this is either a Monitor Data Only Event or else it is     *
*        a "Normal" event.                                                *
*                                                                         *
*     If this event is only a monitor Specific Trigger then:              *
*        Send a monitor data only message to the 68020 terminal.          *
*        Send the Data Cable Driver Finished signal to the COMINT.        *
*        Wait for the COMINT Slave Ready signal to fall.                  *
*        Drop the Data Cable Driver Finished signal.                      *
*        Clear the TWB's that say that "No Slave Readies Seen" and        *
*        "VME is Not Running".  Return to waiting for another Slave       *
*        Ready.                                                           *
*                                                                         *
*     If this event is any combination of Specific Triggers that          *
*        includes at least one "normal" Specific Trigger then:            *
*        Make a 16 bit Event Number for the VBD to read and save          *
*           information to display the Sync Bits if there is time.        *
*        Build the Crate Header words #1 (the sync word) and Crate        *
*           Header word #5 (the list of Specific Triggers Fired).         *
*        Call the routine to move the CTFE Et data to where the           *
*           VBD will read it from.                                        *
*        Call the routine to build the lists of which Spec Trig's         *
*           were programmed to use which Ref Sets AND fired for           *
*           this event.                                                   *
*        Call the routine to build the EM Jet List.                       *
*        Call the routine to build the Total Et Jet List.                 *
*                                                                         *
*        Initialize the maximum wait counter to time how long is          *
*           required to find a free VBD Buffer.                           *
*        Examine the VBD Buffer Select Counter to learn which             *
*           VBD Buffer should be tested first.  If the first one          *
*           tested is not available then test the other one.              *
*           A VBD Buffer is free and ready to be used for this event      *
*           if both its CSR Port Status and DMA bits are zero.            *
*        Check for (and wait for) a free  VBD Buffer.                     *
*        If neither Buffer becomes available with in the maximum          *
*           wait then, send an message to the console, pulse the          *
*           Data Cable Driver Finished line, Set the Can NOT Transfer     *
*           to L2 Trouble Warning Bit,  and return to waiting for a       *
*           Slave Ready signal.                                           *
*        Finding a free VBD Buffer within maximum wait time then:         *
*        Tell the selected free VBD Buffer to run the DMA list.           *
*        Send to the 68020 terminal either a "0" or a "1".                *
*        Zero the DMA time out counter.                                   *
*        Wait for the DMA to finish; increment the DMA time out           *
*           counter with each loop of testing the DMA status.             *
*        If the DMA times out then send a message to the 68020            *
*           terminal and continue. If it does not time out then           *
*           when the DMA is finished just continue from here.             *
*        Send the Data Cable Driver Finished signal to the COMINT.        *
*        Wait for the COMINT Slave Ready signal to fall.                  *
*        Drop the Data Cable Driver Finished signal.                      *
*        Clear the Slave Ready Not Seen, clear the Can't Transfer to      *
*           L2, and clear the VME Not Running Trouble Warning Bits.       *
*        If the wait to receive the Slave Ready for this event            *
*           was longer than SRMINDISP then the current event rate         *
*           is low enough to take the time to display a message.          *
*           If it was a short wait then move on with no message.          *
*           If it was a long wait then display on the 68020 a message     *
*              which gives details about this event and this transfer     *
*              to Level 2.                                                *
*        Return to the start of the cyclic section.                       *
*           (wait for Slave Ready).                                       *
*                                                                         *
*                                                                         *
*                                                                         *
*  Control of the Trouble Warning Bits                                    *
*                                                                         *
*     During the period while waiting for the Start Jet List or the       *
*     Slave Ready signal:                                                 *
*        In every cycle of the loop testing for Slave Ready, cycle the    *
*           VME Transfer Program Running TWB (bit #1)  Low-High-Low.      *
*        If Slave Ready is not seen with in the max wait time then set    *
*           the Slave Ready Not Seen TWB (bit #4) High.                   *
*                                                                         *
*     In the monitor data only events routine Clear:  the No Slave        *
*        Readies Seen and the VME Not Running Trouble Warning Bits.       *
*        Then test to see if you could transfer an event to L2 if you     *
*        wanted to  (i.e. test to see if either VBD buffer is free).      *
*        If either VBD buffer is free, then you could transfer to L2      *
*        if you wanted to so clear the Can't Transfer to L2 Trouble       *
*        Warning Bit if it is set.                                        *
*                                                                         *
*     In the normal exit from the normal events routine Clear the:        *
*        No Slave Readies Seen, the Can't Transfer to L2, the VME Not     *
*        Running, and the One VBD Buffer Stuck  Trouble Warning Bits.     *
*        Note that at this time no test is being made that should ever    *
*        set the One VBD Buffer Stuck TWB but for now it is a good idea   *
*        to clear it here anyway because this is the point where we       *
*        have the best indication that every thing is running OK.         *
*                                                                         *
*     In the can't find a free VBD Buffer to transfer a normal event      *
*        routine, Set the Can't Transfer to L2 Trouble Warning Bit.       *
*                                                                         *
*                                                                         *
*  Control of the State Bits                                              *
*                                                                         *
*     At various places in this routine set the State Bits to indicate    *
*     which section of the L1 Data Block transfer to L2 is currently      *
*     taking place:                                                       *
*                                                                         *
*     1. StateWaitSvRd  Waiting for Slave Ready to go High.  Do not exit  *
*                       this state when State Jet List arrives; wait for  *
*                       the Slave Ready to exit this state.               *
*     2. StateRun68k    Running the section of the 68k code that: builds  *
*                       jet lists, reads pulsers, moves data, builds the  *
*                       block header, and reads the absolute time.        *
*     3. StateSearchVBD  Looking - Waiting to find a free VBD Buffer.     *
*     4. StateRunDMA   Waiting for the VBD to finish running it DMA list. *
*     5. StateNone   None of the above, at this time this only includes   *
*                    the time spent putting long messages on the console  *
*                    including during Monitor Data Only events.           *
*                                                                         *
***************************************************************************


*************************************************************************
*       This section defines program-specific macros:                   *
*                                                                       *
*            RDIO:  Read bit from IRONICS I/O card and returns state    *
*            WRIO:  Write bit(s) to the IRONICS I/O card                *
*            SOFTWAIT:  Software delay timer for short waits            *
*                                                                       *
*************************************************************************

RDIO    MACRO                                 ; read byte from I/O port.
        CMPI.B  \1,\2                         ; is selected line high?
        ENDM                                  ; set Z on result.


WRIO    MACRO                                 ; write byte to I/O port.
        NOT.B   \1                            ; complement input.
        MOVE.B  \1,\2                         ; and send to port.
        ENDM


SOFTWAIT   MACRO                              ; Software timer loop.
           LOCAL    WAITMORE                  ; Define a local symbol.
           MOVE.L   \1,D4                     ; Load delay time into D4.
WAITMORE   SUBI.L   #1,D4                     ; Decrement loop counter.
           BNE      WAITMORE                  ; Test for end of delay.
           ENDM                               ; Called with an argument
                  ; of $1000 and with cashe off causes a delay of about 4
                  ; mill seconds, with cashe on the delay is 2.4 mill sec.


*************************************************************************
*  Cyclic Section:                                                      *
*                                                                       *
*  Wait for a L1 trigger and for the COMINT Data Block Builder to       *
*  signal Start Jet List.    The Start Jet List signal indicates that   *
*  we are far enough into the Data Block Building process that we will  *
*  not have a L15 Reject.                                               *
*                                                                       *
*  Recall that the Start Jet List signal is normally HIGH and that it   *
*  goes LOW to signal that it is OK to Start the Jet List.  The Slave   *
*  Ready signal is a normal High Active signal, i.e. Slave Ready goes   *
*  HIGH to signal that the Data Block Builder is finished.              *
*                                                                       *
*       Ironics Port #3                                                 *
*       Bit#4     Bit#0             Indicated Status                    *
*      -------   -------    ---------------------------------------     *
*         Hi       Low      Nothing is ready.                           *
*         Hi        Hi      Slave Ready is indicated.                   *
*        Low       Low      Start Jet List is indicated.                *
*        Low        Hi      Start Jet List & Slave Ready are indicated. *
*                                                                       *
*                                                                       *
*  Note that we will also look for the Slave Ready signal just in       *
*  case we have missed the Start Jet List signal.  The Start Jet List   *
*  signal does "go away" when the COMINT is finished building the Data  *
*  Block.                                                               *
*                                                                       *
*  When the program starts the wait for the  Start Jet List signal      *
*  (or the Slave Ready signal) it sets the State Bits to StateWaitSvRd  *
*  to indicate that it is waiting for Slave Ready to go high.           *
*                                                                       *
*  Count how long we have waited for Start Jet List (or Slave Ready)    *
*  to go High in the location SJLLoopCnt.  The size of this count       *
*  will let us know how long of an information message can be sent      *
*  to the 68k terminal after the transfer to the VBD and also lets      *
*  us know if there has NOT been a Start Jet List (or Slave Ready)      *
*  signal in a very long time and thus we should pulse the Data         *
*  Cable Driver Finished line to clear something in COMINT. After       *
*  finding a Start Jet List signal (or Slave Ready signal), store the   *
*  wait count in location SJLLoopCnt.                                   *
*                                                                       *
*  Each time going around the loop waiting for the Start Jet List       *
*  (or Slave Ready) signal pulse the VME Transfer Program Running       *
*  bit in the Trouble Warning Bits low- high-low to indicate that       *
*  the VME Transfer Program is running.                                 *
*                                                                       *
*  If the Start Jet List (or Slave Ready) signal is not seen within     *
*  the SJLMaxWait number of loops execute the STUCK routine to try      *
*  to free up the COMINT card. In the STUCK routine pulse the Data      *
*  Cable Driver Finished line, send a message to the 68k console,       *
*  and set the No Slave Readies Seen bit in the Trouble Warning         *
*  Bits.                                                                *
*                                                                       *
*  When Start Jet List (or Slave Ready) signal goes high then do the    *
*  following steps:                                                     *
*                                                                       *
*    Read the Absolute Time over the Vertical Interconnect and          *
*      store the data in the "2nd" 214 Memory module.                   *
*                                                                       *
*    Read the CD Pulser Programming data and the Cal Pulser             *
*      Programming data over the Vertical Interconnect and store this   *
*      data in the "2nd" 214 Memory module.                             *
*                                                                       *
*    Set the State Bits in the following way.  If only the Start Jet    *
*      List signal was found the stay in the state StateWaitSvRd.  If   *
*      the Slave Ready signal was also found high then switch to the    *
*      state StateRun68k.                                               *
*                                                                       *
*************************************************************************

               ALIGN   4               ; Align to Longword Address.

Begin_Cyclic   Move.B  #StateWaitSvRd,StatePortAdrs   ; Set the State Bits to
                                                      ; indicate Waiting for
                                                      ; Slave Ready to go hi.

        CLR.L   D1                     ; Starting the wait for Start Jet List
                                       ;   or else the Slave Ready signal
                                       ;   so zero the loop counter.

TestSJL  MOVE.B  TWBData,D0            ; Pulse the Trouble Warning Bit #0,
         MOVE.B  D0,D7                 ; the VME Transfer Program Running
         ORI.B   #$01,D0               ; bit, low-high-low to flag that
         WRIO    D0,TWBPortAdrs        ; the VME Transfer Program is
         ANDI.B  #$FE,D7               ; Running OK.
         WRIO    D7,TWBPortAdrs

        RDIO    #$00,SlvRdy            ; Look for the Start Jet List to be
        BEQ     VerSJL                 ; active and if it is then verify it.

        RDIO    #$11,SlvRdy            ; Look for the Slave Ready to be
        BEQ     VerSJL                 ; active and if it is then verify it.

        RDIO    #$01,SlvRdy            ; Look for the Start Jet List and the
        BEQ     VerSJL                 ;   Slave Ready to both be active.  If
                                       ; they are both active, then verify it.

        ADD.L   #$1,D1                 ; Increment the wait for Start Jet
                                       ;   List counter.
        CMP.L   SJLMaxWait,D1          ; Test to see if it has been the max
        BEQ     SJLstuck               ;   wait.  If so pulse the  Finished
                                       ;   line to wake up the COMINT.
        JMP     TestSJL                ; Wait for the Start Jet List or the
                                       ;   Slave Ready.


VerSJL  RDIO    #$00,SlvRdy            ; Verify the Start Jet List signal.
        BEQ     ReadVert               ; If still active, Read the Vert Inter.

        RDIO    #$11,SlvRdy            ; Verify the Slave Ready signal.
        BEQ     StateRead              ; If still active, then change to a
                                       ;   new state and Read the Vert Inter.

        RDIO    #$01,SlvRdy            ; Verify the Start Jet List signal and
                                       ;   the Slave Ready signal.
        BEQ     StateRead              ; If both still active, then change to
                                       ;   new state and Read the Vert Inter.

        JMP     TestSJL                ; Neither Start Jet List nor Slave
                                       ;   Ready verified as being high so go
                                       ;   back to waiting for one of them.


SJLstuck  MOVE.B  #Bit1High,D0         ; Send a Data Cable Driver
          WRIO    D0,DCDrFin           ;   Finished signal to COMINT.
          SOFTWAIT  #$1000             ; Wait about 4 mill seconds.
          MOVE.B  #AllBitsLow,D0       ; Drop the Data Cable Driver
          WRIO    D0,DCDrFin           ;   Finished signal.

        PEA.L   SJLWaitMsg1            ; Send a message saying that neither
        JSR     ChrStrgOut             ;   Start Jet List nor Slave Ready
                                       ;   was seen within Max Wait.
        PEA.L   SJLWaitMsg2            ; Pulsing Data Cable Driver Finished
        JSR     ChrStrgOut             ;   to free up the COMINT card.

        MOVE.B  TWBData,D0             ; Set the No Slave Readies Seen bit
        ORI.B   #$08,D0                ;   in the Trouble Warning Bits to
        MOVE.B  D0,TWBData             ;   flag the problem for monitoring.
        WRIO    D0,TWBPortAdrs         ;   Send the new TWB's out their port.

        JMP     Begin_CYCLIC           ; Start looking again for the Start Jet
                                       ;   List signal.  Zero the SJLLoopCnt.


*****  OK we have a Start Jet List or else a Slave Ready so store the   *****
*****  count of how long we had to wait for a Start Jet List (or Slave  *****
*****  Ready) in the variable SJLLoopCnt and then read the Absolute     *****
*****  Time and the Central Detector and Calo Pulser Programming Data.  *****

StateRead   Move.B  #StateRun68k,StatePortAdrs     ; If the Slave Ready signal
                                                   ;   was found High, then
                                                   ;   Set the State Bits to
                                                   ;   indicate Running 68k
                                                   ;   before starting to read
                                                   ;   over the Vert Intercon.

ReadVert    Move.L  D1,SJLLoopCnt      ; Store the count of how long we have
                                       ;  waited for either Start Jet List
                                       ;  or else Slave Ready.


*****  Call the subroutine to read the Absolute Time Data.  *****

           MOVEA.L  BAAbsoTime,A0    ; Give the Get_Time the address where it
                                     ;   should store the Absolute Time data.
           JSR  Begin_Get_Time       ; Subroutine call to get the Time Data.


***  Call the subroutine to read the Central Detector Pulser Programming  ***
***  Data via the Vertical Interconnect.  The starting location to store  ***
***  this data in MVME-214 memory is passed to the routine in Reg A0.     ***

        MOVEA.L    BAPulser,A0      ; Give Get_CD_Pulser the address where
                                    ;   it should store the CD Pulser data.
        JSR  Begin_Get_CD_Pulser    ; Subroutine call to get CD Pulser Data.


***  Call the subroutine to read the Calorimeter Pulser Programming       ***
***  Data via the Vertical Interconnect.  The starting location to store  ***
***  this data in MVME-214 memory is passed to the routine in Reg A0.     ***

       MOVEA.L   BAPulser,A0         ; Give Get_Calo_Pulser the address where
       ADD.L     #$100,A0            ;   it should store the Calo Pulser data.
       JSR  Begin_Get_Calo_Pulser    ; Subroutine call to get Cal Pulser Data.

       JMP     WaitSlvRdy            ; All of the Vertical Interconnect data
                                     ;   has now been read so start waiting
                                     ;   for the Data Block Builder to finish
                                     ;   i.e. wait for the Slave Ready signal.


*************************************************************************
*  Cyclic Section:                                                      *
*                                                                       *
*  Wait for a the COMINT Data Block Builder to finish building a new    *
*  L1 Data Block.   When COMINT is finished building a Data Block it    *
*  sets the Slave Ready signal High.                                    *
*                                                                       *
*  If the Slave Ready was not found set high in the above Vertical      *
*  Interconnect reading routine (as it typically should not be high     *
*  yet)  then keep the State Bits set to StateWaitSvRd to indicate      *
*  that we are waiting for Slave Ready to go high.                      *
*                                                                       *
*  Count how long we have to wait for Slave Ready to go  High in the    *
*  location SRLoopCnt.   It typically should require only a fraction    *
*  of a mill sec for the Data Block builder to finish.  This size of    *
*  this count will let us know how if we have had to wait for a Slave   *
*  Ready signal for too long of a time and thus we should pulse the     *
*  Data Cable Driver Finished line to clear something in COMINT.        *
*                                                                       *
*  Each time going around the loop waiting for Slave Ready pulse the    *
*  VME Transfer Program Running bit in the Trouble Warning Bits low-    *
*  high-low to indicate that the VME Transfer Program is running.       *
*                                                                       *
*  If Slave Ready is not seen within the SRMaxWait number of loops      *
*  execute the STUCK routine to try to free up the COMINT card.  In     *
*  the STUCK routine pulse the Data Cable Driver Finished line, send    *
*  a message to the 68k console, and set the No Slave Readies Seen      *
*  bit in the Trouble Warning Bits.                                     *
*                                                                       *
*  When Slave Ready goes high then jump to the routine PROCEVT  i.e.    *
*  process the event.                                                   *
*                                                                       *
*************************************************************************

               ALIGN   4               ; Align to Longword Address.

WaitSlvRdy     CLR.L   D1              ; Starting the wait for Slave Ready
                                       ;   so zero the loop counter.

TestSR  MOVE.B  TWBData,D0             ; Pulse the Trouble Warning Bit #0,
        MOVE.B  D0,D7                  ; the VME Transfer Program Running
        ORI.B   #$01,D0                ; bit, low-high-low to flag that
        WRIO    D0,TWBPortAdrs         ; the VME Transfer Program is
        ANDI.B  #$FE,D7                ; Running OK.
        WRIO    D7,TWBPortAdrs

        RDIO    #$11,SlvRdy            ; Look for the Slave Ready HI.  Recall
                                       ;   that the Data Block Builder will
                                       ;   be finished when Slave Ready goes
                                       ;   Hi, so Start Jet List will no
                                       ;   longer be in its active state
                                       ;   (i.e. it will no longer be Low).
        BEQ     VerfSR                 ; If high, then verify that it is HI.

        ADD.L   #$1,D1                 ; Increment the wait for Slv Rdy count.
        CMP.L   SRMaxWait,D1           ; Test to see if it has been the max
        BEQ     Stuck                  ;   wait.  If so pulse the  Finished
                                       ;   line to wake up the COMINT.
        JMP     TestSR                 ; Wait for the Slave Ready.


VerfSR  RDIO    #$11,SlvRdy            ; Verify that Slave Ready is HI. Recall
                                       ;   that the Data Block Builder will
                                       ;   be finished when Slave Ready goes
                                       ;   Hi, so Start Jet List will no
                                       ;   longer be in its active state
                                       ;   (i.e. it will no longer be Low).
        BEQ     ProcEvt                ; If still high, then process the event.
        JMP     TestSR                 ; Back to waiting for the Slave Ready.


Stuck   MOVE.B  #Bit1High,D0           ; Send a Data Cable Driver
        WRIO    D0,DCDrFin             ;   Finished signal to COMINT.
        SOFTWAIT  #$1000               ; Wait about 4 mill seconds.
        MOVE.B  #AllBitsLow,D0         ; Drop the Data Cable Driver
        WRIO    D0,DCDrFin             ;   Finished signal.

        PEA.L   SRWaitMsg1             ; Send a message saying that SR not
        JSR     ChrStrgOut             ;   seen within Max Wait.
        PEA.L   SRWaitMsg2             ; Pulsing Data Cable Driver Finished
        JSR     ChrStrgOut             ;   to free up the COMINT card.

        MOVE.B  TWBData,D0             ; Set the No Slave Readies Seen bit
        ORI.B   #$08,D0                ;   in the Trouble Warning Bits to
        MOVE.B  D0,TWBData             ;   flag the problem for monitoring.
        WRIO    D0,TWBPortAdrs         ;   Send the new TWB's out their port.

        JMP     Begin_CYCLIC           ; We timed out looking for the Slave
                                       ;   Ready signal after having received
                                       ;   a Start Jet List signal.  The
                                       ;   Comint card has been cleard via a
                                       ;   Data Cable Driver Finished signal.
                                       ;   Start looking again for the Start
                                       ;   Jet List signal.  Zero SJLLoopCnt.


*************************************************************************
*  Cyclic Section:                         Begining of Process Event    *
*                                                                       *
*  Slave Ready has gone high and been verified as being high.  Store    *
*  the counter that shows how long we waited for the Slave Ready to go  *
*  high and then increment BUFSELECT to alternate which of the VBD      *
*  buffers will be used for this event.                                 *
*                                                                       *
*  Set the State Bits to StateRun68k to indicate that the portion of    *
*  the 68k program that: builds jet lists, moves data, reads pulsers,   *
*  and builds headers is now running.                                   *
*                                                                       *
*  Call the Spec_Trig_Prog_Fired routine.  This routine will build the  *
*  a long word which shows which Spec Trigs fired for this event and    *
*  it will store this information at location TrgsFired and return it   *
*  in data register D1.  This routine also builds the 8 lists which     *
*  show for each Reference Set which Spec Trigs were both programmed    *
*  to use a given Reference Set and fired on this event.                *
*                                                                       *
*  AND the Specific Triggers Fired list with the mask of monitor data   *
*  only Specific Triggers.                                              *
*                                                                       *
*  If just a monitor Specific Trigger (e.g. #31) fired then this event  *
*  is only L1 monitor data and it should NOT be sent to the VBD or L2.  *
*  If any other Specific Trigger(s), besides the monitor data only      *
*  Specific Trigger(s), fired then send this L1 Data Block to the VBD   *
*  and L2.                                                              *
*************************************************************************

                ALIGN   4              ; Align to Longword Address.

ProcEvt   Move.B  #StateRun68k,StatePortAdrs       ; Set the State Bits to
                                                   ; indicate Running 68k.

        ADD.L   #$1,BufSelect          ; Alternate which VBD buffer is used.
        MOVE.L  D1,SRLoopCnt           ; Store the count of how long we have
                                       ;   waited for a Slave Ready.

        JSR  Begin_Spec_Trig_Prog_Fire      ; Call to build list of Spec Trigs
                                            ; fired and 8 lists of Spec Trigs
                                            ; that depended on a given Ref Set
                                            ; AND fired on this event.

        AND.L   MskMonSpTrg,D1              ; Test for Spec Trigs besides
                                            ;   just Monitor Spec Triggers.
        BEQ     OnlyMon                     ; Branch to service Monitor data
                                            ;   only "events".
        JMP     OtherTrgs                   ; Jump to service events that have
                                            ;   a Spec Trig besides Mon trigs.


*************************************************************************
*  Cyclic Section:    START of service for Monitor Data only "events".  *
*                                                                       *
*  Service events in which only Monitor Specific Triggers have          *
*  fired.  This implies --> monitor data only events.                   *
*                                                                       *
*  Send a message to the 68k termanal that this is monitor data only.   *
*                                                                       *
*************************************************************************

OnlyMon  Move.B  #StateNone,StatePortAdrs     ; Set the  StateNone  State Bit
                                              ; to indicate the we are in none
                                              ; of the defined States.

         PEA.L    MonMessage                ; Push monitor data only message
         JSR      ChrStrgOut                ; on the stack and send it out.

         Move.B  #StateRun68k,StatePortAdrs       ; Set the State Bits to
                                                  ; indicate Running 68k.

*************************************************************************
*  Cyclic Section:                 Monitor Data only "events"           *
*                                                                       *
*  Tell COMINT that the VBD is finished and wait for SLV Ready to drop. *
*                                                                       *
*************************************************************************

        MOVE.B  #Bit1High,D0                ; Send a Data Cable Driver
        WRIO    D0,DCDrFin                  ;   Finished signal to COMINT.

StilHi  RDIO    #$11,SlvRdy            ; Look at Slave Ready and wait for it
                                       ;   to go Low.  Recall that the Data
                                       ;   Block Builder will not be running
                                       ;   so that the active low Start Jet
                                       ;   List signal will be a voltage Hi.
        BEQ     StilHi                 ; If Slave Ready is still high then
                                       ;   keep waiting until it drops then.

        MOVE.B  #AllBitsLow,D0              ; Drop the Data Cable Driver
        WRIO    D0,DCDrFin                  ;   Finished signal.

*************************************************************************
*  Cyclic Section:      END of service for Monitor Data only "events".  *
*                                                                       *
*  Update the Trouble Warning Bits.                                     *
*    Clear the "No Slaves Ready" and the "VME Not Running" Trouble      *
*    Warning Bits.  Then test to see if either VBD buffer is free       *
*    i.e. test to see if you could transfer to L2 if you wanted to.     *
*    If there is a free VBD buffer then you could transfer to L2        *
*    if you wanted to so clear the  Can't Transfer to L2 Trouble        *
*    Warning Bit.   If there is not a free VBD buffer then do not       *
*    set or clear the  Can't Transfer to L2  Trouble Warning Bit.       *
*  Return to the begining of the Cyclic Section.                        *
*************************************************************************

        MOVE.B  TWBData,D0             ; The VME processor must be receiving
        ANDI.B  #$F6,D0                ; Slave Readies for the program to get
        MOVE.B  D0,TWBData             ; here so, Clear the No Slave Readies
        WRIO    D0,TWBPortAdrs         ; and the VME Not Running  Trouble
                                       ; Warning Bits.

*****  Test to see if either VBD buffer is free.  If there is a free  *****
*****  buffer then jump to FreBufExist.  If neither VBD buffer is     *****
*****  free then return to the beginning of the cyclic section.       *****

        CLR.L   D0                      ; Clear all bits in data reg 0.
        MOVE.W  VBDCSR2,D0              ; Move the VBD CSR2 into D0.
        AND.L   MskBuf0Sta,D0           ; Mask all but the Buf 0 DMA and
                                        ;   Buf 0 port status bits.
        BEQ     FreBufExist             ; If both CSR bits are 0 then, Buf 0 is
                                        ;   ready to use so beq to FreBufExist.
                                        ; Else test the other buffer.
        CLR.L  D0                       ; Clear all bits in data reg 0.
        MOVE.W  VBDCSR2,D0              ; Move the VBD CSR2 into D0.
        AND.L   MskBuf1Sta,D0           ; Mask all but the Buf 1 DMA and
                                        ;   Buf 1 port status bits.
        BEQ     FreBufExist             ; If both CSR bits are 0 then, Buf 1 is
                                        ;   ready to use so beq to FreBufExist.
                                        ; Else neither buffer is free so
                                        ;   just return.
        JMP     Begin_CYCLIC            ; Return to the start of the
                                        ;   cyclic section.

                                        ; To reach here a free VBD buffer
                                        ; exists so clear the Can't Transfer
                                        ; to L2 Trouble Warning Bit before
                                        ; returning to the start of cyclic.
FreBufExist   MOVE.B  TWBData,D0        ; Get the Trouble Warning Bits and
              ANDI.B  #$F2,D0           ; clear: No Slaves Ready, 68k Not
              MOVE.B  D0,TWBData        ; Running, and Can't Transfer to L2.
              WRIO    D0,TWBPortAdrs    ; Store and output the TWB's and then
                                        ; return.
              JMP     Begin_CYCLIC      ; Return to the start of the
                                        ;   cyclic section.


*************************************************************************
*  Cyclic Section:          START of service for normal events.         *
*                                                                       *
*  Service events in which some combination of normal (non-Monitor)     *
*  Specific Triggers have fired.  In addition some Monitor Specific     *
*  Triggers may have fired.                                             *
*                                                                       *
*  Start by building the 16 bit  TAS Number.   The low order 4 bits     *
*  of the TAS Number are the low order 4 bits of the 40 bit Transfer    *
*  Number.  The high order 12 bits of the TAS Number are the low order  *
*  12 bits of the 40 bit Start Digitize Number.                         *
*                                                                       *
*  Make a copy of the 16 bit TAS Number in in Short IO Address Space    *
*  where the VBD can read it.  Also store the TAS Number in location    *
*  TRGNUMSTORE.                                                         *
*                                                                       *
*  Recall the format of the Transfer Number as written in VME memory    *
*  with VMX address line MDA01 inverted.  TrgNum is the symbol for      *
*  the address of the first long word that holds Transfer Number data.  *
*                                                                       *
*                                                                       *
*               3     2 2     1 1                                       *
*               1     4 3     6 5     8 7     0                         *
*    TrgNum    ---------------------------------                        *
*    $300284   |       | 2nd B |       | 1st B |      Bytes of the      *
*              ---------------------------------      Transfer Number   *
*                                                                       *
*               3     2 2     1 1                                       *
*               1     4 3     6 5     8 7     0                         *
*              ---------------------------------                        *
*  TrgNum+4    |       | 4th B |       | 3rd B |      Bytes of the      *
*              ---------------------------------      Transfer Number   *
*                                                                       *
*               3     2 2     1 1                                       *
*               1     4 3     6 5     8 7     0                         *
*              ---------------------------------                        *
*  TrgNum+8    |       | 1st B |       | 5th B |      Bytes of the      *
*              ---------------------------------                        *
*                       StDgNum         Trn Num                         *
*                                                                       *
*               3     2 2     1 1                                       *
*               1     4 3     6 5     8 7     0                         *
*              ---------------------------------                        *
*  TrgNum+12   |       | 3rd B |       | 2nd B |      Bytes of Start    *
*              ---------------------------------      Digitize Number   *
*                                                                       *
*************************************************************************

           ALIGN   4                     ; Align to Longword Address.

OTHERTRGS  MOVE.L  TrgNum,D0             ; Get 2nd and 1st bytes of Trans Num.
           AndI.L  #$0000000F,D0         ; Keep only the Low Order 4 bits of
                                         ; the 1st byte of Transfer Number and
                                         ; store it in the lowest byte of D0.

           Move.L  TrgNum+8,D2           ; Get part of Start Digitize Number.
           Swap    D2                    ; 1st byte of StrDgt Num is now in
                                         ; the lowest byte of register D2.

           Move.L  TrgNum+12,D3          ; Get part of Start Digitize Number.
                                         ; 2nd byte of StrDgt Num in low D3.

           Clr.L   D4                    ; Clear D4 to build part of TAS.
           Move.B  D3,D4                 ; Get 2nd byte of StrDgt Num into D4
           LSL.L   #8,D4                 ; and Shift it up 8 bits.

           Move.B  D2,D4                 ; Get 1st byte of Start Digitize Num.
           LSL.L   #4,D4                 ; Now shift it up 4 bits.
           AndI.L  #$0000FFF0,D4         ; Trim it to 12 bits.

           Or.L    D4,D0                 ; D0 now holds the 16 bit TAS Number.
                                         ; Number in its least significnt word.

           MOVE.W  D0,EvtNmbAdr133       ; Store the 16 bit TAS Num in the
                                         ;   Short IO Address memory space
                                         ;   for the VBD to read.

           MOVE.L  D0,TrgNumStore        ; Store the 16 bit TAS Number
                                         ;   in a longword.

*****************************************************************************
*                                                                           *
*  Cyclic Section:            Service Data Block for Normal Events          *
*                                                                           *
*  Build the words #1 and #5 of the Crate Header.                           *
*  Words #2, #3, and #4 of the Crate Header are event to event static       *
*  and have been built and stored in the Initialization Section above.      *
*                                                                           *
*    Crate Header Word 1   Sync Word   2 MSByts TAS Num  2 LSByts of F's    *
*    Crate Header Word 2   Controller Word  MSByte is the low byte Crate ID *
*    Crate Header Word 3   Version Number  4-JAN-1990 Document definition   *
*    Crate Header Word 4   Rivision Number   defined in D0 Note #967        *
*    Crate Header Word 5   Specific Triggers Fired list    32 bits          *
*                                                                           *
*****************************************************************************

                                         ; D0 still holds the 16 bit TAS Num.
        SWAP    D0                       ; Move the 16 bit TAS Num into
                                         ;   the high order 16 bits.
        MOVE.W  #$FFFF,D0                ; Pad the Sync Word with F's.
        MOVE.L  D0,CrtHDWord1            ; Store the Sync Word in the
                                         ;   first word of the Crate Header.

        MOVE.L  TrgsFired,CrtHDWord5     ; Store the Specific Triggers Fired
                                         ;   list in the 5th word of the
                                         ;   Crate Header.


*************************************************************************
*                                                                       *
*  Cyclic Section:            Service Data Block for Normal Events      *
*                                                                       *
*  Call the subroutine to move the EM and HD CTFE Et data from where    *
*  the COMINT has written it to where the VBD will read it.             *
*************************************************************************

        JSR  Begin_Move_Data    ; Subroutine call to move CTFE Et data.


*************************************************************************
*                                                                       *
*  Cyclic Section:            Service Data Block for Normal Events      *
*                                                                       *
*  Call the subroutine to build the EM Jet List.                        *
*************************************************************************

        JSR  Begin_EM_Jet_List     ; Subroutine call to build the EM Jet List.


*************************************************************************
*                                                                       *
*  Cyclic Section:            Service Data Block for Normal Events      *
*                                                                       *
*  Call the subroutine to build the Total Et Jet List.                  *
*************************************************************************

        JSR  Begin_TEt_Jet_List                  ; Subroutine call to build
                                                 ; the Total Et Jet List.


*************************************************************************
*                                                                       *
*  Cyclic Section:            Service Data Block for Normal Events      *
*                                                                       *
*  All of the data and headers are now ready to be read by the VBD.     *
*  Examine BUFSELECT to determine which of the two buffers (0 or 1)     *
*  on the VBD should be used to DMA read this data.  The buffers are    *
*  used on alternate events.                                            *
*  Initialize the maximum wait time counter for finding a free buffer.  *
*************************************************************************

        MOVE.L  BBSMaxWait,D4               ; Load the maximum wait (times
                                            ; tested) to find a free Buffer.

        MOVE.L  BufSelect,D0                ; Move Buffer Select into D0.
        ANDI.L  #$00000001,D0               ; Mask all but the lowest bit
                                            ;   of the Buffer Select.
        BEQ     USEBUF0                     ; Bufselect even - use Buffer 0.
        JMP     USEBUF1                     ; Bufselect odd  - use Buffer 1.

*************************************************************************
*                                                                       *
*  Cyclic Section:  Service Data Block for Normal Events, use Buffer 0  *
*                                                             --------  *
*  If VBD buffer 0 has been selected for the transfer of this event     *
*  then this section takes care of testing that buffer 0 is connected   *
*  to the VME port and that it is not currently running a DMA cycle.    *
*  If everything is OK then a DMA cycle will be started to move VME     *
*  data into buffer 0.                                                  *
*                                                                       *
*  If it is found that buffer 0 is either connected to the external     *
*  port or that buffer 0 is already doing a DMA cycle then the program  *
*  will jump to test the status of buffer 1 and try to use it.  If the  *
*  program has already tested both buffers many times ( > BBSMAXWAIT )  *
*  and has not found a free buffer, then it will branch to BBSTMOUT.    *
*                                                                       *
*  Once the DMA operation is started on buffer 0, a short message,      *
*  "0", will be sent to the 68020 console.                              *
*                                                                       *
*  Next the program will test for the completion of the DMA cycle on    *
*  buffer 0.  If the DMA cycle completes in less than about 1/2 second  *
*  then everything is normal and execution proceeds to the NCYCEXIT     *
*  section.  If the DMA cycle does not complete within the 1/2 second   *
*  then an error message is displayed and then execution proceeds to    *
*  the NCYCEXIT section.                                                *
*                                                                       *
*  As soon as the code starts looking for a free VBD Buffer it sets     *
*  the State Bits to StateSearchVBD.  As soon as the code starts the    *
*  VBD running its DMA list it sets the State Bits to StateRunDMA.      *
*                                                                       *
*************************************************************************

          ALIGN   4                       ; Align to Longword Address.

USEBUF0   Move.B  #StateSearchVBD,StatePortAdrs  ; Set the State Bits to
                                                 ; indicate Searching for a
                                                 ; free VBD Buffer.

          CLR.L   D0                      ; Clear all bits in data reg 0.
          MOVE.W  VBDCSR2,D0              ; Move the VBD CSR2 into D0.
          AND.L   MskBuf0Sta,D0           ; Mask all but the Buf 0 DMA and
                                          ;   Buf 0 port status bits.
          BEQ     BUF0RDY                 ; If both CSR bits are 0 then,
                                          ;   Buffer 0 is ready to use.
                                          ; Else
          SUBI.L  #$1,D4                  ; Decrement the max wait counter
                                          ;   for finding a free VBD buffer.
          BEQ     BBSTMOUT                ; If time is up and no free buffer
                                          ;   found then branch to time out.
                                          ; If max wait is not used up then
          JMP     USEBUF1                 ; Try to use buffer 1 it may
                                          ;   be free.

BUF0RDY   MOVE.W  Buf0DMAGo,VBDCSR0       ; Start the DMA running into Buf 0.

          Move.B  #StateRunDMA,StatePortAdrs      ; Set the State Bits to
                                                  ; indicate Running the VBD's
                                                  ; DMA List.

                                            ; Send out the one character
Chk30TxRDY    Move.B   AdrTxStat,D4         ; message "0"  --> VBD buffer #0.
              ANDI.L   #$00000080,D4        ; Read MFP Transmitter Status Reg.
              IF.B  D4 <NE> #$80  THEN.S    ; Mask all but Tx Buffr Empty Bit.
                JMP  Chk30TxRDY             ; Test if Buffer Empty bit is set,
              ENDI                          ; i.e. ready to send next charctr?
              Move.B   #$30,AdrTxBufr       ; Keep testing as needed.   Load
                                            ; character "0" into Tx Buffer.

        MOVE.L  WaitDMA,D4                ; Initialize the register to wait
                                          ;  for the DMA cycle to finish.

         CLR.L   D0                       ; Clear all bits in data reg 0.
CHKDMA0  MOVE.W  VBDCSR2,D0               ; Move the VBD CSR2 into D0.
         AND.L   MskBuf0DMA,D0            ; Mask all but the Buf 0 DMA status.

        BEQ     NCYCEXIT                  ; If DMA status is zero then the
                                          ;   Buffer 0 DMA cycle has finished.
                                          ;   Jump to the exit processing for
                                          ;   normal events.

        SUBI.L  #$1,D4                    ; DMA cycle has not finished.
                                          ;   Decrement its time out counter.
        BNE     CHKDMA0                   ; Not timed out, check status again.
        PEA.L   GiveUp0                   ; Timed out, Push message on stack.
        JSR     ChrStrgOut                ; Display Buf 0 DMA time out message
        JMP     NCYCEXIT                  ; Jump to the exit processing for
                                          ;   normal events.


*************************************************************************
*                                                                       *
*  Cyclic Section:  Service Data Block for Normal Events, use Buffer 1  *
*                                                             --------  *
*  If VBD buffer 1 has been selected for the transfer of this event     *
*  then this section takes care of testing that buffer 1 is connected   *
*  to the VME port and that it is not currently running a DMA cycle.    *
*  If everything is OK then a DMA cycle will be started to move VME     *
*  data into buffer 1.                                                  *
*                                                                       *
*  If it is found that buffer 1 is either connected to the external     *
*  port or that buffer 1 is already doing a DMA cycle then the program  *
*  will jump to test the status of buffer 0 and try to use it.  If the  *
*  program has already tested both buffers many times ( > BBSMAXWAIT )  *
*  and has not found a free buffer, then it will branch to BBSTMOUT.    *
*                                                                       *
*  Once the DMA operation is started on buffer 1, a short message,      *
*  "1", will be sent to the 68020 console.                              *
*                                                                       *
*  Next the program will test for the completion of the DMA cycle on    *
*  buffer 1.  If the DMA cycle completes in less than about 1/2 second  *
*  then everything is normal and execution proceeds to the NCYCEXIT     *
*  section.  If the DMA cycle does not complete within the 1/2 second   *
*  then an error message is displayed and then execution proceeds to    *
*  the NCYCEXIT section.                                                *
*                                                                       *
*  As soon as the code starts looking for a free VBD Buffer it sets     *
*  the State Bits to StateSearchVBD.  As soon as the code starts the    *
*  VBD running its DMA list it sets the State Bits to StateRunDMA.      *
*                                                                       *
*************************************************************************

          ALIGN   4                       ; Align to Longword Address.

USEBUF1   Move.B  #StateSearchVBD,StatePortAdrs  ; Set the State Bits to
                                                 ; indicate Searching for a
                                                 ; free VBD Buffer.

          CLR.L  D0                       ; Clear all bits in data reg 0.
          MOVE.W  VBDCSR2,D0              ; Move the VBD CSR2 into D0.
          AND.L   MskBuf1Sta,D0           ; Mask all but the Buf 1 DMA and
                                          ;   Buf 1 port status bits.
          BEQ     BUF1RDY                 ; If both CSR bits are 0 then,
                                          ;   Buffer 1 is ready to use.
                                          ; Else
          SUBI.L  #$1,D4                  ; Decrement the max wait counter
                                          ;   for finding a free VBD buffer.
          BEQ     BBSTMOUT                ; If time is up and no free buffer
                                          ;   found then branch to time out.
                                          ; If max wait is not used up then
          JMP     USEBUF0                 ; Try to use buffer 0 it may
                                          ;   be free.

BUF1RDY   MOVE.W  Buf1DMAGo,VBDCSR0       ; Start the DMA running into Buf 1.

          Move.B  #StateRunDMA,StatePortAdrs      ; Set the State Bits to
                                                  ; indicate Running the VBD's
                                                  ; DMA List.

                                            ; Send out the one character
Chk31TxRDY    Move.B   AdrTxStat,D4         ; message "1"  --> VBD buffer #1.
              ANDI.L   #$00000080,D4        ; Read MFP Transmitter Status Reg.
              IF.B  D4 <NE> #$80  THEN.S    ; Mask all but Tx Buffr Empty Bit.
                JMP  Chk31TxRDY             ; Test if Buffer Empty bit is set,
              ENDI                          ; i.e. ready to send next charctr?
              Move.B   #$31,AdrTxBufr       ; Keep testing as needed.   Load
                                            ; character "1" into Tx Buffer.

        MOVE.L  WaitDMA,D4                ; Initialize the register to wait
                                          ;  for the DMA cycle to finish.

         CLR.L  D0                        ; Clear all bits in data reg 0.
CHKDMA1  MOVE.W  VBDCSR2,D0               ; Move the VBD CSR2 into D0.
         AND.L   MskBuf1DMA,D0            ; Mask all but the Buf 1 DMA status.

        BEQ     NCYCEXIT                  ; If DMA status is zero then the
                                          ;   Buffer 1 DMA cycle has finished.
                                          ;   Jump to the exit processing for
                                          ;   normal events.

        SUBI.L  #$1,D4                    ; DMA cycle has not finished.
                                          ;   Decrement its time out counter.
        BNE     CHKDMA1                   ; Not timed out, check status again.
        PEA.L   GiveUp1                   ; Timed out, Push message on stack.
        JSR     ChrStrgOut                ; Display Buf 1 DMA time out message
        JMP     NCYCEXIT                  ; Jump to the exit processing for
                                          ;   normal events.

*************************************************************************
*  Cyclic Section:          END of service for normal events.           *
*                                                                       *
*  The VBD DMA cycle has finished  (or timed out).  The VBD may still   *
*  be doing the transfer to L2 but, COMINT may access the MVME-214      *
*  memory again when it is ready to.                                    *
*                                                                       *
*  The VBD DMA list has finished so set the State Bits to StateNone.    *
*                                                                       *
*  Because the VBD DMA operation has finished,  send a Data Cable       *
*  Driver Finished signal to the COMINT.                                *
*                                                                       *
*  If the program gets here then it is not stuck waiting for a Slave    *
*  Ready and it did find a VBD buffer to use to transfer the L1 Data    *
*  Block to Level 2,  thus we need to clear the No Slave Readies Seen   *
*  bit and the Can Not Transfer to L2 Because Both VBD Buffers Stuck    *
*  bit from the byte of Trouble Warning Bits.                           *
*                                                                       *
*  If there has been a long time since the last event (i.e. transfer    *
*  to Level 2) then this section will send a detailed message to the    *
*  68k's terminal screen.                                               *
*                                                                       *
*  Return to the begining of the Cyclic Section.                        *
*                                                                       *
*************************************************************************

           ALIGN   4                        ; Align to Longword Address.

NCYCEXIT   Movea.L   BAAbsoTime,A0         ; Load the pointer to the
                                           ; Absolute Time data.  Save the
           Move.L   (A0)+,D1               ; Absolute Time data before sending
           Move.L   (A0),D2                ; the Data Cable Driver Finished
                                           ; signal in case the rate is low
                                           ; enough for full transfer display.


           MOVE.B  #Bit1High,D0             ; Send a Data Cable Driver
           WRIO    D0,DCDrFin               ;   Finished signal to COMINT.

HiStil  RDIO    #$11,SlvRdy            ; Look at Slave Ready and wait for it
                                       ;   to go Low.  Recall that the Data
                                       ;   Block Builder will not be running
                                       ;   so that the active low Start Jet
                                       ;   List signal will be a voltage Hi.
        BEQ     HiStil                 ; If Slave Ready is still high then
                                       ;   keep waiting until it drops then.

        MOVE.B  #AllBitsLow,D0              ; Drop the Data Cable Driver
        WRIO    D0,DCDrFin                  ;   Finished signal.


        MOVE.B  TWBData,D0             ; Clear the No Slave Readies Seen bit,
        ANDI.B  #$F0,D0                ;   the Can Not Transfer to Level 2
        MOVE.B  D0,TWBData             ;   bit, the VME Not Running bit, and
        WRIO    D0,TWBPortAdrs         ;   the One VBD Buffer Stuck  Trouble
                                       ;   Warning Bits.  Send the new TWB's
                                       ;   out their port.


        MOVE.L  SJLLoopCnt,D0               ; Move loop count of how long of
                                            ;   a wait for a trigger into D0.
        SUB.L   SRMinDisp,D0                ; Subtract the minimum wait for a
                                            ;   full display from the wait.
        BMI     Begin_CYCLIC                ; The result is negative --> not a
                                            ;   long enough wait for Sl Rdy -->
                                            ;   high transfer rate --> no time
                                            ;   to send full display --> start
                                            ;   waiting for the next Slave Rdy.


                                            ; The transfer rate is low so there
                                            ;   is enough time to send a full
                                            ;   display about this event.

        Move.B  #StateNone,StatePortAdrs    ; Set the  StateNone  State Bit
                                            ; to indicate the we are in none
                                            ; of the defined States
                                            ; i.e. the Display State.


                    ; As a part of this full display about the transfer
                    ; of this event, display the Absolute Time Information.

        PEA.L   BlankLine             ; Skip down to the next line.
        JSR     ChrStrgOut            ; Send out a space, CR, LF.
        PEA.L   BlankLine             ; Skip a line.
        JSR     ChrStrgOut            ; Send out a space, CR, LF.

        Swap     D1                   ; Now put the words back in their
        Swap     D2                   ; original order for display use below.

        PEA.L   ChrYears              ; First display the Years.
        JSR     ChrWrtOut             ; Label the years information.
        ROL.L   #4,D1                 ; Get the 1st char of years into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.
        ROL.L   #4,D1                 ; Get the 2nd char of years into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.

        PEA.L   ChrMonth              ; Next display the Months.
        JSR     ChrWrtOut             ; Label the month information.
        ROL.L   #4,D1                 ; Get the 1st char of months into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.
        ROL.L   #4,D1                 ; Get the 2nd char of months into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.

        PEA.L   ChrDays               ; Next display the Days.
        JSR     ChrWrtOut             ; Label the days information.
        ROL.L   #4,D1                 ; Get the 1st char of days into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.
        ROL.L   #4,D1                 ; Get the 2nd char of days into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.

        PEA.L   BlankLine             ; Skip down to the next line.
        JSR     ChrStrgOut            ; Send out a space, CR, LF.

        PEA.L   ChrHours              ; Next display the Hours.
        JSR     ChrWrtOut             ; Label the hours information.
        ROL.L   #4,D1                 ; Get the 1st char of hours into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.
        ROL.L   #4,D1                 ; Get the 2nd char of hours into
        Move.L  D1,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.

        PEA.L   ChrMinute             ; Next display the Minutes.
        JSR     ChrWrtOut             ; Label the minute information.
        ROL.L   #4,D2                 ; Get the 1st char of minute into
        Move.L  D2,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.
        ROL.L   #4,D2                 ; Get the 2nd char of minute into
        Move.L  D2,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.

        PEA.L   ChrSecond             ; Next display the Seconds.
        JSR     ChrWrtOut             ; Label the seconds information.
        ROL.L   #4,D2                 ; Get the 1st char of seconds into
        Move.L  D2,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.
        ROL.L   #4,D2                 ; Get the 2nd char of seconds into
        Move.L  D2,-(A7)              ; position and push it on the stack.
        JSR     BinASCII              ; Convert to ASCII and sent it out.


        PEA.L   TransInfo1                  ; The first part of the Transfer
        JSR     ChrWrtOut                   ; Information message.

        MOVE.L  TrgNumStore,D0              ; Recall the 16 bit TAS Number.
        AND.L   Low4Long,D0                 ; Mask off the part of the TAS Num
        Move.L  D0,-(A7)                    ; that is not Transfer Number sync
        JSR     BinASCII                    ; bits.  Push it convert it into
                                            ; ASCII and send it out.

        PEA.L   TransInfo2                  ; The second part of the Transfer
        JSR     ChrWrtOut                   ; Information message

        MOVE.L  TrgsFired,D0                ; Get the Spec Trig's Fired data.

        FOR.L  TransInfo5 = #1 TO #8  DO.S    ; Loop for all 8 characters of
           ROL.L   #4,D0                      ; the Spec Trig Fired.  Rotate
           Move.L  D0,-(A7)                   ; left into position and push.
           JSR     BinASCII                   ; Convert to ASCII and send out.
        ENDF

        PEA.L   TransInfo3                  ; The third and last part of msg.
        JSR     ChrStrgOut                  ; System Call, write data message.


        IF.L  GetTimeError <EQ> #0  THEN.S   ; Display a message to indicate if
           PEA.L  MsgTimeOK                  ; the Time read went OK.   If the
           JSR    ChrStrgOut                 ; flag  GetTimeError  is zero
        ELSE                                 ; then the Time read had no bus
           PEA.L  MsgTimeBad                 ; errors.  If the flag is non-zero
           JSR    ChrStrgOut                 ; then there was a bus error
        ENDI                                 ; during the Absolute Time read.



        IF.L  GetCentPulsEr <NE> #0  THEN.S  ; If neither bus error flag was
           JMP CEPPR                         ; set while reading the Pulser
        ENDI                                 ; Programing Data then send a
                                             ; pulser data OK message.
        IF.L  GetCalPulsErr <NE> #0  THEN.S  ; Check the Central Detector
           JMP CEPPR                         ; flag and then the Calorimeter
        ENDI                                 ; detector flag.
                                             ;
        PEA.L  MsgPulserOK                   ; Pulser programming data
        JSR    ChrStrgOut                    ; read OK message.


CEPPR   IF.L  GetCentPulsEr <NE> #0  THEN.S  ; There was a bus error while
           PEA.L  MsgCentErr                 ; reading Central Detector Pulser
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.


        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #1,D0                        ; Pulsers.  Mask all but #1.
        IF.L  D0 <EQ> #1  THEN.S             ; There was a bus error while
           PEA.L  MsgCalEr1                  ; reading North EC Pulsers 0,1
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #2,D0                        ; Pulsers.  Mask all but #2.
        IF.L  D0 <EQ> #2  THEN.S             ; There was a bus error while
           PEA.L  MsgCalEr2                  ; reading Central Calo Pulsers 2,3
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #4,D0                        ; Pulsers.  Mask all but #4.
        IF.L  D0 <EQ> #4  THEN.S             ; There was a bus error while
           PEA.L  MsgCalEr4                  ; reading South EC Pulsers 4,5,6,7
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #8,D0                        ; Pulsers.  Mask all but #8.
        IF.L  D0 <EQ> #8  THEN.S             ; There was a bus error while
           PEA.L  MsgCalEr8                  ; reading Central Calo Pulsers 8,9
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #16,D0                       ; Pulsers.  Mask all but #16.
        IF.L  D0 <EQ> #16  THEN.S            ; There was a bus error while
           PEA.L  MsgCalEr16                 ; reading North EC Pulsers A,B
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #32,D0                       ; Pulsers.  Mask all but #32.
        IF.L  D0 <EQ> #32  THEN.S            ; There was a bus error while
           PEA.L  MsgCalEr32                 ; reading South EC CETEC
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #64,D0                       ; Pulsers.  Mask all but #64.
        IF.L  D0 <EQ> #64  THEN.S            ; There was a bus error while
           PEA.L  MsgCalEr64                 ; reading Central Calo CETEC
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #128,D0                      ; Pulsers.  Mask all but #128.
        IF.L  D0 <EQ> #128  THEN.S           ; There was a bus error while
           PEA.L  MsgCalEr128                ; reading North EC CETEC
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #256,D0                      ; Pulsers.  Mask all but #256.
        IF.L  D0 <EQ> #256  THEN.S           ; There was a bus error while
           PEA.L  MsgICDEr256                ; reading ICD Pulsers C,D
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.

        Move.L  GetCalPulsErr,D0             ; Error Flags from reading Calo
        ANDI.L  #512,D0                      ; Pulsers.  Mask all but #512.
        IF.L  D0 <EQ> #512  THEN.S           ; There was a bus error while
           PEA.L  MsgICDEr512                ; reading In-Spill Ped Pulser
           JSR    ChrStrgOut                 ; Programming Data so send out
        ENDI                                 ; an error message.


        PEA.L   DCDFHI                      ; Push Transfer Finished on stack.
        JSR     ChrStrgOut                  ; System Call, write message.

        JMP     Begin_CYCLIC                ; Return to the start of the
                                            ;   cyclic section.

***************************************************************************
*  Cyclic Section:   END because of time out looking for a free buffer.   *
*                                                                         *
*  A free VBD Buffer was not found within the maximum wait time (number   *
*  of test loops).  Both buffers must be stuck waiting to transfer on     *
*  the Data Cable.                                                        *
*    Send a warning - status message to the 68020 console.                *
*    Send a Data Cable Driver Finished signal to the COMINT card.         *
*    Set the bit in the Trouble Warning Bits that indicates to            *
*      monitoring that L1 can not transfer Data Blocks to Level 2         *
*      because both of the VBD buffers are stuck.                         *
*  Then return to the begining of the cyclic section.                     *
*                                                                         *
***************************************************************************

          ALIGN   4                         ; Align to Longword Address.

BBSTMOUT  PEA.L    BBSTMMSG1                ; push message 1 address on stack.
          JSR      ChrStrgOut               ; and send it out.
          PEA.L    BBSTMMSG2                ; push message 2 address on stack.
          JSR      ChrStrgOut               ; and send it out.


        MOVE.B  #Bit1High,D0                ; Send a Data Cable Driver
        WRIO    D0,DCDrFin                  ;   Finished signal to COMINT.

LTSRHi  RDIO    #$11,SlvRdy            ; Look at Slave Ready and wait for it
                                       ;   to go Low.  Recall that the Data
                                       ;   Block Builder will not be running
                                       ;   so that the active low Start Jet
                                       ;   List signal will be a voltage Hi.
        BEQ     LTSRHi                 ; If Slave Ready is still high then
                                       ;   keep waiting until it drops then.

        MOVE.B  #AllBitsLow,D0              ; Drop the Data Cable Driver
        WRIO    D0,DCDrFin                  ;   Finished signal.


        MOVE.B  TWBData,D0             ; Set the Can Not Transfer to Level 2
        ORI.B   #$04,D0                ;   bit in the Trouble Warning Bits to
        MOVE.B  D0,TWBData             ;   flag the problem for monitoring.
        WRIO    D0,TWBPortAdrs         ;   Send the new TWB's out their port.

        JMP     Begin_CYCLIC                ; Return to the start of the
                                            ;   cyclic section.
                                            ; End of cyclic processing routine.


*************************************************************************
*  Define Constants:                                                    *
*                                                                       *
*  Data used to send messages to the 68k terminal screen.               *
*                                                                       *
*************************************************************************

              ALIGN   4                ; Align to Longword Address.

SRWaitMsg1    DC.B    43,$0D,$0A,'Slave Ready not seen within the max wait.'
SRWaitMsg2    DC.B    46,'Pulse the Data Cable Driver Finished signal.',$0D,$0A

SJLWaitMsg1   DC.B    44,$0D,$0A,'Neither Start Jet List or Slave Ready seen'
SJLWaitMsg2   DC.B    46,'within the max wait. Pulse DCD Finished.    ',$0D,$0A

MonMessage  DC.B  51,$0D,$0A,'Data Block with only Monitor Data not transfered.'

GiveUp0     DC.B    44,$0D,$0A,'The VBD Buffer 0 DMA cycle has timed out.',$0A
GiveUp1     DC.B    44,$0D,$0A,'The VBD Buffer 1 DMA cycle has timed out.',$0A

BBSTMMSG1     DC.B    36,$0D,$0A,'Both VBD Buffers are stuck waiting'
BBSTMMSG2     DC.B    31,'to transfer on the Data Cable.',$0A

TransInfo1    DC.B    14,$0D,$0A,'SYNC BITS = '
TransInfo2    DC.B    20,'  SPEC TRIG FIRED = '
TransInfo3    DC.B    2,'  '

              Align 4

TransInfo5    DS.L    1

DCDFHI        DC.B    19,'Transfer Finished',$0D,$0A

MsgTimeOK     DC.B   21,'Absolute Time Read OK'
MsgTimeBad    DC.B   25,'Absolute Time Read Failed'

MsgPulserOK   DC.B   14,'Pulser Read OK'
MsgCentErr    DC.B   25,'Central Pulser Read Error'

MsgCalEr1     DC.B   34,'Error Reading North EC Pulsers 0,1'
MsgCalEr2     DC.B   38,'Error Reading Central Calo Pulsers 2,3'
MsgCalEr4     DC.B   38,'Error Reading South EC Pulsers 4,5,6,7'
MsgCalEr8     DC.B   38,'Error Reading Central Calo Pulsers 8,9'
MsgCalEr16    DC.B   34,'Error Reading North EC Pulsers A,B'
MsgCalEr32    DC.B   28,'Error Reading South EC CETEC'
MsgCalEr64    DC.B   32,'Error Reading Central Calo CETEC'
MsgCalEr128   DC.B   28,'Error Reading North EC CETEC'
MsgICDEr256   DC.B   29,'Error Reading ICD Pulsers C,D'
MsgICDEr512   DC.B   38,'Error Reading In-Spill Pedestal Pulser'

BlankLine        DC.B    1,' '
ChrYears         DC.B    5,'Year '
ChrMonth         DC.B   10,'    Month '
ChrDays          DC.B   10,'      Day '
ChrHours         DC.B    5,'Hour '
ChrMinute        DC.B   10,'   Minute '
ChrSecond        DC.B   10,'   Second '

AdrTxStat   EQU  $FFF8002D       ! Address of the MFP Transmitter Status Reg.
AdrTxBufr   EQU  $FFF8002F       ! Address of the MFP Transmitter Buffer Reg.

*************************************************************************
*  Define Constants:                 External References                *
*                                                                       *
*************************************************************************

       XDEF   Begin_Cyclic                          ; Export this symbol
                                                    ; to other modules.

       XREF   SlvRdy,BufSelect,Bit1High,Bit5High    ; Symbols referenced
       XREF   Bits1and5Hi,AllBitsLow,DCDrFin        ; in this program
       XREF   SRLoopCnt,SRMaxWait                   ; module but defined
       XREF   SJLLoopCnt,SJLMaxWait                 ; in another module
       XREF   TrgFire,TrgsFired,MskMonSpTrg         ; Main_Symbols.Include
       XREF   TrgNum,EvtNmbAdr133,TrgNumStore
       XREF   CrtHDWord1,CrtHDWord5
       XREF   BBSMaxWait,MskBuf0Sta,MskBuf1Sta
       XREF   VBDCSR0,VBDCSR2,WaitDMA
       XREF   MskBuf0DMA,MskBuf1DMA
       XREF   Buf0DMAGo,Buf1DMAGo
       XREF   SRMinDisp,Low4Long
       XREF   Begin_Move_Data,Begin_Spec_Trig_Prog_Fire
       XREF   Begin_EM_Jet_List,Begin_TEt_Jet_List
       XREF   Begin_Get_CD_Pulser,Begin_Get_Calo_Pulser
       XREF   Begin_Get_Time
       XREF   BAPulser,BAAbsoTime,GetTimeError
       XREF   GetCentPulsEr,GetCalPulsErr
       XREF   TWBData,TWBPortAdrs
       XREF   StatePortAdrs
       XREF   StateWaitSvRd,StateRun68k,StateSearchVBD,StateRunDMA,StateNone
       XREF   ChrStrgOut,ChrWrtOut,BinASCII

       END

