File: Inner_Program.Txt Rev. 18-NOV-1993 The following source, command, and include files make up the "Inner Program": INNERASM.CMD This is the OS/2 command file to Assemble all modules in the Inner program. INNERLNK.CMD This is the OS/2 command file to Link all of the program INNER.LNK sections in the Inner program. It just tells the Linker to INNERLNK.MAP look in Linker command file INNER.LNK for ALL of the Linker files and options. This makes the InnerLnk.Map file. INNERBLD.CMD This is the HexConvert command file to make a bootable image INNERBLD.MAP of the Inner program. It also makes the map file InnerBld.Map INNER_01.A40 This routine does the the first initialization of the C40 e.g. it sets up the Status Reg, the Stack, the Vector Tables. Then it branches to the "Scan Loop" i.e. the routine that looks for Trig Towers that are over their Ref Set threshold. INNER_DT.A40 This is the routine that sets up the 4 blocks of Trigger Tower data and one block of Ref Set data. INNER_LP.A40 This is the "Scan Loop" which looks for Trig Towers that are over their Ref Set threshold. When it finds a TT over threshold then it branches to the proper eta ring instance of the Tool Code. INNER_T2.A40 This is the Eta Ring n+2 instance of Tool Code for the 3x3 5x5 algorithm. INNER_T3.A40 These are the files for the Eta Ring n+3, n+4, and n+5 INNER_T4.A40 instances of Tool Code. For now they are just "returns" INNER_T5.A40 to the calling routine. INNER_TK.INC This is an include file that is referenced by all 4 instances of the Tool Code source files. It is used to define some symbols that are common to all 4 instances of Tool Code. These symbols must be absolute and not external because they are used as immediate data in C40 instructions. Note: We could have used an Index Register for these instructions but for now we should save these registers for a more important purpose (and this construction saves the 50 nsec to load one of them). General Idea of the Inner Test Progeram: ---------------------------------------- For now the idea was that the scan loop would repeatedly scan the 128 TT's looking for TT's over threshold. Each complete trip through the scan loop it would increment a counter (i.e. a memory location somewhere in Dual Port SRAM Land (but not where the bootable image is stored)). Then from the 68k deBug console we could read the value of this counter, wait and read it again to see how fast the scan loop is. Note: In the source file Inner_Lp.A40 near the bottom I have put comments for this counter but no code for it yet. Near the bottom of the eta ring n+2 Tool Code source file there is also a place for a Dual Port SRAM counter (comments and no code yet). This counter would show how often this Tool Code was called. The idea was to play and watch these counters from the 68k deBug console and get an idea how well things ran (i.e. is the program working OK, how long does it take for a "Scan Loop"? how long to execute the 3x3-5x5 Tool Code? ) Once we know these times then we will have some idea about how much of the re invented L2 system overhead we can stand in our L1.5 system. The 3x3-5x5 Tool Code should also be changed to stick its 3x3 EM sum and its 5x5 HD sum into Dual Port SRAM as a way to verify that it is working OK. Then the idea is to change the values in different TT data locations to operate the Inner Program under different conditions e.g. no towers over threshold, 1,2,3 over threshold, verify that the proper Total Et TT's make it into the 5x5 Tot sum "" for EM sum, ..... The idea was to understand where in the bootable image (stored at $A00000) the various interesting TT data is located and then directly play with it via 68k deBug, and then push the C40 boot button again and watch the Dual Port SRAM counters again. Memory Map of the "Inner Program" --------------------------------- On-Chip RAM starting at 002ff800h This holds the Trigger Tower Data. There are 4 blocks of data. In increasing C40 address order they are: Rack #1 EM Et, Rack #1 Total Et, Rack #2 EM Et, and Rack #2 Total Et. There are 32 words in each of these 4 blocks. As currently setup there are spaces between these blocks. At this time no other use is made of the on-chip RAM. Local SRAM starting at 40000000h All executable code is loaded here (i.e. initialization, Scan Loop, Tool Code). This is pure code, no constants or working RAM is loaded in this area. After booting, execution starts at 40000000h. Dual Port SRAM starting at 80000000h The bootable image begins at 80000000h. Later in this 8k word block the "counter" locations and the locations for the 3x3 sum and 5x5 sum (and any other useful debug information) should be located. Global SRAM starting at 0C0000000h This begins with the Trap Vector table (512 words) then the Interrupt Vector Table (64 words) then the Stack (512 words) then various constants the Reference Set (128 words) and any needed working RAM. The idea is that the Data Page Pointer can always be kept aimed at this area of memory. This lets us quickly reference 32 bit "immediate" data in one instruction. The general idea of the memory use is to separate and spread out things into the different hardware memory sections so that things can run at full speed i.e. never a wait because you were trying to read two things out of the same hardware section of memory on the same C40 cycle.