# # FPGA Fabric DDR4 Controller to DDR4 Memory Chips # ------------- # # Power Supply and Sundry Net List # ----------------------------------------------------- # # # Initial Rev. 10-Mar-2023 # Current Rev. 1-Mar-2023 # # # This net list holds the Power and Ground connections # on each Memory Chip and 2 Sundry pins on each of # these chips. # # The DDR4 memory chips which are assumed to be Micron # MT40A1G16 16 Gbit, 1 Gig Address by 16 Data Bits in the # 96 pin BGA package. # # U1 is the MPFS250T FPGA-CPU in the FCVG784 package # # U301 is the MT40A1G16 SDRAM for data bits 0:15 # U302 is the MT40A1G16 SDRAM for data bits 16:31 # # # The ZQ signal has an external 240 Ohm resistor to # Ground - a separate resistor for each of the 2 SDRAM chips. # # # This file has 44 pins on each Memory Chip # and no pins on the DDR4 Memory Controller. # # # For the 2 Memory Chips: # # the ZQ Reference Resistors # # the Clock Termination Resistors and Capacitors # # the ALERT_B Pull-Up Resistor # # the RESET_B Pull-Down Resistor # # the TEN Pull-Down Resistor # # the Un-Used pin on each Memory Chip # NET 'ZQ_REFERENCE_U301' U301-F9 R328-2 NET 'ZQ_REFERENCE_U302' U302-F9 R329-2 NET 'GROUND' R328-1 R329-1 NET 'DDR4_FPGA_ClK_CMP' R326-2 NET 'DDR4_FPGA_CLK_DIR' R327-2 NET 'DDR4_FPGA_CLK_TERM' R326-1 R327-1 NET 'DDR4_FPGA_CLK_TERM' C385-2 C386-2 NET 'BULK_1V2' C385-1 C386-1 NET 'DDR4_FPGA_ALERT_B' R330-2 NET 'BULK_1V2' R330-1 NET 'DDR4_FPGA_RESET_B' R331-2 NET 'GROUND' R331-1 NET 'DDR4_FPGA_TEN' R332-2 NET 'GROUND' R332-1 NET 'NO_CONN_U301_PIN_T7' U301-T7 NET 'NO_CONN_U302_PIN_T7' U302-T7 # # U301 Power and Ground # NET 'BULK_1V2' U301-B3 U301-B9 U301-D1 U301-G7 U301-J1 # VDD NET 'BULK_1V2' U301-J9 U301-L1 U301-L9 U301-R1 U301-T9 NET 'BULK_1V2' U301-A1 U301-A9 U301-C1 U301-D9 U301-F2 # VDDQ NET 'BULK_1V2' U301-F8 U301-G1 U301-G9 U301-J2 U301-J8 NET 'Digital_2V5' U301-B1 U301-R9 # VPP NET 'DDR4_VREF_FPGA' U301-M1 # VREF NET 'GROUND' U301-B2 U301-E1 U301-E9 U301-G8 U301-K1 # VSS NET 'GROUND' U301-K9 U301-M9 U301-N1 U301-T1 NET 'GROUND' U301-A2 U301-A8 U301-C9 U301-D2 U301-D8 # VSSQ NET 'GROUND' U301-E3 U301-E8 U301-F1 U301-H1 U301-H9 # # U302 Power and Ground # NET 'BULK_1V2' U302-B3 U302-B9 U302-D1 U302-G7 U302-J1 # VDD NET 'BULK_1V2' U302-J9 U302-L1 U302-L9 U302-R1 U302-T9 NET 'BULK_1V2' U302-A1 U302-A9 U302-C1 U302-D9 U302-F2 # VDDQ NET 'BULK_1V2' U302-F8 U302-G1 U302-G9 U302-J2 U302-J8 NET 'Digital_2V5' U302-B1 U302-R9 # VPP NET 'DDR4_VREF_FPGA' U302-M1 # VREF NET 'GROUND' U302-B2 U302-E1 U302-E9 U302-G8 U302-K1 # VSS NET 'GROUND' U302-K9 U302-M9 U302-N1 U302-T1 NET 'GROUND' U302-A2 U302-A8 U302-C9 U302-D2 U302-D8 # VSSQ NET 'GROUND' U302-E3 U302-E8 U302-F1 U302-H1 U302-H9 # # Bypass Capacitors for U301 # NET 'BULK_1V2' C301-1 C302-1 C303-1 C304-1 C305-1 NET 'BULK_1V2' C306-1 C307-1 C308-1 C309-1 C310-1 NET 'BULK_1V2' C311-1 C312-1 C313-1 C314-1 C315-1 NET 'BULK_1V2' C316-1 C317-1 NET 'GROUND' C301-2 C302-2 C303-2 C304-2 C305-2 NET 'GROUND' C306-2 C307-2 C308-2 C309-2 C310-2 NET 'GROUND' C311-2 C312-2 C313-2 C314-2 C315-2 NET 'GROUND' C316-2 C317-2 NET 'Digital_2V5' C320-1 C321-1 C322-1 C323-1 C324-1 NET 'Digital_2V5' C325-1 NET 'GROUND' C320-2 C321-2 C322-2 C323-2 C324-2 NET 'GROUND' C325-2 NET 'DDR4_VREF_FPGA' C327-1 C328-1 C329-1 NET 'GROUND' C327-2 C328-2 C329-2 # # Bypass Capacitors for U302 # NET 'BULK_1V2' C331-1 C332-1 C333-1 C334-1 C335-1 NET 'BULK_1V2' C336-1 C337-1 C338-1 C339-1 C340-1 NET 'BULK_1V2' C341-1 C342-1 C343-1 C344-1 C345-1 NET 'BULK_1V2' C346-1 C347-1 NET 'GROUND' C331-2 C332-2 C333-2 C334-2 C335-2 NET 'GROUND' C336-2 C337-2 C338-2 C339-2 C340-2 NET 'GROUND' C341-2 C342-2 C343-2 C344-2 C345-2 NET 'GROUND' C346-2 C347-2 NET 'Digital_2V5' C350-1 C351-1 C352-1 C353-1 C354-1 NET 'Digital_2V5' C355-1 NET 'GROUND' C350-2 C351-2 C352-2 C353-2 C354-2 NET 'GROUND' C355-2 NET 'DDR4_VREF_FPGA' C357-1 C358-1 C359-1 NET 'GROUND' C357-2 C358-2 C359-2