# # FPGA DDR4 Reference and Terminator # ------ # # Power Supply Net List # ------------------------------------------ # # # Initial Rev. 13-Mar-2023 # Current Rev. 15-Nov-2023 # # # This net list holds the Reference and Terminator # Power Supply nets for the FPGA DDR4 Memory. # ------ # # These nets involve Reference Designators starting at 1921. # # # Aux Power Vin to this power supply chip: # NET 'BULK_3V3' U1921-10 C1921-1 C1922-2 NET 'BULK_3V3' U1921-7 # Enable Pin NET 'GROUND' C1921-2 C1922-1 # # VLD0 Input Power to this power supply chip: # NET 'BULK_1V2' U1921-2 C1923-1 C1924-1 NET 'GROUND' C1923-2 C1924-2 # # Terminator Power Output from this power supply chip: # and its Remote Sense input: NET 'DDR4_VTERM_FPGA' U1921-3 C1925-1 C1926-2 # Terminator Output Power NET 'GROUND' C1925-2 C1926-1 NET 'DDR4_VTERM_FPGA' U1921-5 # Remote Sense Input # # Reference Output from this power supply chip: # NET 'DDR4_VREF_FPGA' U1921-6 C1927-1 # Reference Output NET 'GROUND' C1927-2 # # Reference Input to this power supply chip: # NET 'BULK_1V2' R1921-2 NET 'Ref_to_FPGA_Term_Supply' R1921-1 R1922-2 C1928-2 U1921-1 NET 'GROUND' R1922-1 C1928-1 # # Ground Pins on the FPGA DDR4 Term Ref Power Supply Chip # NET 'GROUND' U1921-4 U1921-8 NET 'GROUND' U1921-11 U1921-12 U1921-13 U1921-14 # # Voltage Monitor for the FPGA DDR4 Term Ref Power Supply # NET 'DDR4_VTERM_FPGA' R1923-2 NET 'VMON_FPGA_DDR4_TERM' R1923-1 C1929-1 NET 'GROUND' C1929-2 # # Un-Used Pin on the Power Supply Chip # NET 'No_Conn_U1921_pin_9' U1921-9 # Power Good OD Output Pin