# # PMT ADC Net List # ---------------------- # # # Original Rev. 19-Feb-2023 # Current Rev. 18-July-2024 # # # This Net List file assigns net names to all 100 # of the AD9083 ADC pins. # # # Analog Signal Input Pins # -------------------------- # NET 'CH1_ADC_IN_DIR' U601-A5 (NET_TYPE, 'DIFF_ANALOG') NET 'CH1_ADC_IN_CMP' U601-B5 (NET_TYPE, 'DIFF_ANALOG') NET 'CH2_ADC_IN_DIR' U601-A6 (NET_TYPE, 'DIFF_ANALOG') NET 'CH2_ADC_IN_CMP' U601-B6 (NET_TYPE, 'DIFF_ANALOG') NET 'CH3_ADC_IN_DIR' U601-A7 (NET_TYPE, 'DIFF_ANALOG') NET 'CH3_ADC_IN_CMP' U601-B7 (NET_TYPE, 'DIFF_ANALOG') NET 'CH4_ADC_IN_DIR' U601-A8 (NET_TYPE, 'DIFF_ANALOG') NET 'CH4_ADC_IN_CMP' U601-B8 (NET_TYPE, 'DIFF_ANALOG') NET 'CH5_ADC_IN_DIR' U601-A9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH5_ADC_IN_CMP' U601-B9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH6_ADC_IN_DIR' U601-C10 (NET_TYPE, 'DIFF_ANALOG') NET 'CH6_ADC_IN_CMP' U601-C9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH7_ADC_IN_DIR' U601-D10 (NET_TYPE, 'DIFF_ANALOG') NET 'CH7_ADC_IN_CMP' U601-D9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH8_ADC_IN_DIR' U601-E10 (NET_TYPE, 'DIFF_ANALOG') NET 'CH8_ADC_IN_CMP' U601-E9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH9_ADC_IN_DIR' U601-F10 (NET_TYPE, 'DIFF_ANALOG') NET 'CH9_ADC_IN_CMP' U601-F9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH10_ADC_IN_DIR' U601-G10 (NET_TYPE, 'DIFF_ANALOG') NET 'CH10_ADC_IN_CMP' U601-G9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH11_ADC_IN_DIR' U601-H10 (NET_TYPE, 'DIFF_ANALOG') NET 'CH11_ADC_IN_CMP' U601-H9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH12_ADC_IN_DIR' U601-K9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH12_ADC_IN_CMP' U601-J9 (NET_TYPE, 'DIFF_ANALOG') NET 'CH13_ADC_IN_DIR' U601-K8 (NET_TYPE, 'DIFF_ANALOG') NET 'CH13_ADC_IN_CMP' U601-J8 (NET_TYPE, 'DIFF_ANALOG') NET 'CH14_ADC_IN_DIR' U601-K7 (NET_TYPE, 'DIFF_ANALOG') NET 'CH14_ADC_IN_CMP' U601-J7 (NET_TYPE, 'DIFF_ANALOG') NET 'CH15_ADC_IN_DIR' U601-K6 (NET_TYPE, 'DIFF_ANALOG') NET 'CH15_ADC_IN_CMP' U601-J6 (NET_TYPE, 'DIFF_ANALOG') NET 'CH16_ADC_IN_DIR' U601-K5 (NET_TYPE, 'DIFF_ANALOG') NET 'CH16_ADC_IN_CMP' U601-J5 (NET_TYPE, 'DIFF_ANALOG') # # Power Supply Pins # ------------------- # # Analog 1V0 NET 'ADC_ANALOG_1V0' U601-D6 U601-E6 U601-E7 NET 'ADC_ANALOG_1V0' U601-F6 U601-F7 U601-G6 # Analog Clock 1V0 NET 'ADC_ANALOG_1V0' U601-F5 # Analog PLL 1V0 NET 'ADC_ANALOG_1V0' U601-J4 # Analog 1V8 NET 'ADC_ANALOG_1V8' U601-C8 U601-D8 U601-G8 NET 'ADC_ANALOG_1V8' U601-H6 U601-H8 # Digital 1V0 NET 'ADC_Digital_1V0' U601-D3 U601-E3 U601-F3 U601-G3 # Digital Driver 1V0 NET 'ADC_Digital_1V0' U601-B3 U601-C3 U601-H3 # Digital Driver 1V8 NET 'ADC_Digital_1V8' U601-B1 # Digital SPI and I/O 1V8 NET 'ADC_Digital_1V8' U601-B2 # # GROUND Pins # ------------- # # Analog GROUND Pins 9x NET 'GROUND' U601-C6 U601-C7 U601-D7 U601-E8 U601-F8 NET 'GROUND' U601-G7 U601-H5 U601-H7 U601-K10 # Analog AVDD GROUND Reference Pins 2x NET 'GROUND' U601-E5 U601-K4 # Digital GROUND Pins 4x NET 'GROUND' U601-D4 U601-E4 U601-F4 U601-G4 # Digital Driver GROUND Pins 4x NET 'GROUND' U601-A1 U601-C1 U601-C2 U601-H2 # # The four JESD204B ADC Serial Data Links # NET 'ADC_SEROUT0_DIR' U601-D2 # to FPGA XCVR_3_RX0_CMP Criss- NET 'ADC_SEROUT0_CMP' U601-D1 # to FPGA XCVR_3_RX0_DIR Cross NET 'ADC_SEROUT1_DIR' U601-E2 # to FPGA XCVR_3_RX1_CMP Criss- NET 'ADC_SEROUT1_CMP' U601-E1 # to FPGA XCVR_3_RX1_DIR Cross NET 'ADC_SEROUT2_DIR' U601-F2 # to FPGA XCVR_3_RX2_DIR NET 'ADC_SEROUT2_CMP' U601-F1 # to FPGA XCVR_3_RX2_CMP NET 'ADC_SEROUT3_DIR' U601-G2 # to FPGA XCVR_3_RX3_DIR NET 'ADC_SEROUT3_CMP' U601-G1 # to FPGA XCVR_3_RX3_CMP # # Four Clock and Timing Signal Inputs # NET 'PMT_ADC_CLOCK_DIR' U601-K3 # ADC Converter Clock DIR NET 'PMT_ADC_CLOCK_CMP' U601-J3 # ADC Converter Clock CMP NET 'PMT_ADC_SYS_REF_DIR' U601-K2 # ADC System Reference DIR NET 'PMT_ADC_SYS_REF_CMP' U601-J2 # ADC System Reference CMP NET 'PMT_ADC_SYNC_IN_B_DIR' U601-A2 # ADC JESD204B Sync In B DIR NET 'PMT_ADC_SYNC_IN_B_CMP' U601-A3 # ADC JESD204B Sync In B CMP NET 'PMT_ADC_Trigger_DIR' U601-H1 # ADC Trigger Dir Input Float if not used NET 'PMT_ADC_Trigger_CMP' U601-J1 # ADC Trigger Cmp Input Float if not used # # Five ADC Digital Controls mostly inputs and one I/O # ##NET 'ADC_POW_DWN_STBY' U601-C5 # ADC Power Down - Standby Active HI NET 'GROUND' U601-C5 # Ground the ADC_POW_DWN_STBY signal NET 'PMT_ADC_RESET_B' U601-D5 # ADC Reset Active LOW NET 'PMT_ADC_CHIP_SELECT_B' U601-A4 # ADC SPI Chip Select Active LOW NET 'PMT_ADC_SPI_CLOCK' U601-B4 # ADC SPI Clock NET 'PMT_ADC_SPI_DATA_IO' U601-C4 # ADC SPI Data I/O # # Six ADC Static Control pins # NET 'PMT_ADC_Temp_Diode' U601-B10 # ADC Temperature Diode NET 'ADC_CURRENT_REFERENCE' U601-J10 # ADC Current Reference Resistor NET 'ADC_PLL_REG_BYPASS' U601-H4 # ADC PLL VCO Voltage Regulator Bypass Cap NET 'ADC_PLL_COARSE_FILTER' U601-G5 # ADC PLL Coarse Filter Capacitor NET 'NO_CONN_U601_PIN_A10' U601-A10 # ADC Do NOT Connect Pin NET 'NO_CONN_U601_PIN_K1' U601-K1 # ADC Do NOT Connect Pin