# # Power Supply Monitor Net List # --------------------------------------------- # # # Initial Rev. 8-Nov-2022 # Current Rev. 17-Nov-2023 # # # This net list holds the Power Supply Monitor nets # (both Voltage and Current) that run to the J11 # Power Supply Monitor Connector. # # Pinout of the J11 Power Supply Monitor Connector: # # # Currently pins 33:40 are not assigned to # to a Monitor Function or have an assigned Net. # # # # Now the nets that run to J11: # # # Monitor for the 100 V to 5 V Comverter Output: # NET 'VMON_BULK_5V0' J11-1 NET 'GROUND' J11-2 # # Now monitor the Voltage Output and the Current Input # of the 6 DCDC Converters: # NET 'VMON_BULK_1V00' J11-3 NET 'GROUND' J11-4 NET 'IMON_POS_BULK_1V00' J11-5 NET 'IMON_NEG_BULK_1V00' J11-6 NET 'VMON_BULK_1V05' J11-7 NET 'GROUND' J11-8 NET 'IMON_POS_BULK_1V05' J11-9 NET 'IMON_NEG_BULK_1V05' J11-10 NET 'VMON_BULK_1V2' J11-11 NET 'GROUND' J11-12 NET 'IMON_POS_BULK_1V2' J11-13 NET 'IMON_NEG_BULK_1V2' J11-14 NET 'VMON_BULK_1V8' J11-15 NET 'GROUND' J11-16 NET 'IMON_POS_BULK_1V8' J11-17 NET 'IMON_NEG_BULK_1V8' J11-18 NET 'VMON_BULK_2V5' J11-19 NET 'GROUND' J11-20 NET 'IMON_POS_BULK_2V5' J11-21 NET 'IMON_NEG_BULK_2V5' J11-22 NET 'VMON_BULK_3V3' J11-23 NET 'GROUND' J11-24 NET 'IMON_POS_BULK_3V3' J11-25 NET 'IMON_NEG_BULK_3V3' J11-26 # # Now Monitor the Voltage Output of the # - Constant ON 3V3 Regulator # - Termination Supply for the FPGA DDR4 Reference # - Termination Supply for the CPU DDR4 Reference # NET 'VMON_CNST_3V3' J11-27 NET 'GROUND' J11-28 NET 'VMON_FPGA_DDR4_TERM' J11-29 NET 'GROUND' J11-30 NET 'VMON_CPU_DDR4_TERM' J11-31 NET 'GROUND' J11-32 # # For Now the rest of the J11 Pins # are No Connect nets. # NET 'NO_CONN_J11_pin_33' J11-33 NET 'NO_CONN_J11_pin_34' J11-34 NET 'NO_CONN_J11_pin_35' J11-35 NET 'NO_CONN_J11_pin_36' J11-36 NET 'NO_CONN_J11_pin_37' J11-37 NET 'NO_CONN_J11_pin_38' J11-38 NET 'NO_CONN_J11_pin_39' J11-39 NET 'NO_CONN_J11_pin_40' J11-40