From mrangen@ualberta.ca Fri Jul 10 11:25:52 2026 Date: Fri, 10 Jul 2026 15:25:25 +0000 From: Michael Rangen To: Nathan Whitehorn Cc: Dan Edmunds , Juan Pablo Yanez Garza , Carsten Krauss Subject: Re: MIST interface status Hi Nathan, We've been working through the mechanical aspects of the MIST in recent weeks. Lazlo is now checking vertical clearance for us, using a standard 1.6mm PCB and this connector: https://www.digikey.ca/en/products/detail/samtec-inc/EHT-113-01-F-D-RA/6613280 image.png I'm not finished working through the schematic, but can I get some feedback on this pinout? * SWDIO and SWCLK are for debugging and programming, they could be eliminated * Config/!Physics is a mode toggle that could be implemented through UART commands Don't overly scrutinize the power-ORing, I'm planning to improve it with either an ideal-diode IC or something simple like a switch. I've got to think through potential testing scenarios a bit. image.png I've also found some toroidal inductors that should lower the EMI from the switching supplies. image.png image.png Thanks, Mike On Thu, Jul 9, 2026 at 6:26 PM Nathan Whitehorn wrote: Just wanted to check in on this again -- I think this is the last open item for finalizing the mainboard interface documents, so it would be great if we could get it fully defined. Thanks, Nathan On 6/8/26 16:22, Dan Edmunds wrote: > Hello Mike, > > Thank you for thinking about how to best implement the > required control and monitoring functions for the MIST > detector.  We can include any reasonable interface on > the DK board to the MIST system: I2C, SPI, UART ... > > I think that we both want the design work that we are > doing now to be the full real P-One detector - not just > the demonstrator. > > Designing for: stable software, for multiple builds over > a 5 year or so period, and for a reliable 20 year lifetime > will be the challenges.  Good solutions for all of those > issues is more important than saving a penny here & there. > > I get to Edmonton Monday night June 15th and hope to > see you on Tuesday to learn more about all of this. > >     Thank you,  Dan > > > On Mon, 8 Jun 2026, Michael Rangen wrote: > >> Hi gentlemen, >> Dan, sorry I left you hanging for a couple weeks. >> A lot of my time got redirected to PICO, we're finalizing hardware at >> UofA and getting >> it shipped to SNOLAB. >> I'm excited to meet you in person next week, I've really enjoyed >> discussing this design >> with you. >> >> Nathan you're right, Adam brought up an important issue, the >> interface as described >> would require multiple address lines and a demultiplexer. >> I began looking into parts and designing it using discrete SPI ICs, >> but I consistently >> found myself running into negative leaning compromises: >>  *  I could add an ADC anywhere I wanted - but I wouldn't be able to >> grab data fast >>     enough to interpolate the waveform for automated testing or >> characterization >>  *  The high-speed SPI network would extend from the mainboard, >> through the cable, then >>     through the SPI routing to all the various ICs spread across the >> MIST. >>  *  It became expensive and the BOM kept expanding, meaning more >> complexity in supply >>     chain and more potential points of failure. >>  *  Where SPI delivered simplicity in one area, it created hardware >> complexity in >>     others, and didn't deliver improved capabilities to justify it. >> I think I can configure an STM32G474 to be an all in one MIST >> mixed-signal solution: >>  *  It's got internal high speed comparators, with adjustable >> hysteresis, and internal >>     DACs that set their thresholds >>  *  Those same comparator input pins can also be internally routed to >> programmable gain >>     amplifiers, which can be internally routed to ADC inputs which >> can run around 4 MSPS >>     (faster if you lower the SAR bit resoltion) >>  *  Comparators would continue to work in low-power modes when other >> peripherals are >>     disabled >>  *  During testing, or if needed for troubleshooting, I think the ADC >> could (without >>     affecting the comparator) capture enough points from the waveform >> that it could be >>     interpolated, and the interpolated peak and integrated sum could >> be binned. Rather >>     than trying to setup a high-speed SPI interface to grab the data >> from the discrete >>     ADC ICs - the STM32G474 could be doing this work, and then >> histograms could be >>     requested as desired, slowly over UART. >>  *  The ADCs also support hardware oversampling, increasing their >> accuracy for slow >>     changing DC measurements, which I'm interested in for monitoring >> overvoltage of each >>     SiPM. >>  *  Buffered DAC outputs for setting voltages for the SiPM regulators. >>  *  Firmware is updateable, base functionality can be worked out now, >> additional tools >>     developed later. >>  *  Hardware complexity is reduced, power usage reduced, sensitive >> high speed routing is >>     reduced, digital and analog routing regions are more easily >> separated, and >>     capabilities are improved - at the cost of programming >> complexity, but it's arguable >>     that complexity would have existed anyway because software would >> have to be written >>     to control a list of various SPI devices if we had gone that route. >> What this would mean for the interface: >>  *  A fast SPI and its address lines (MISO, MOSI, SCK, A0, A1, A2, >> A4) would be replaced >>     with a slow UART (TX, RX) for talking to the STM32G474's LPUART >> (Low-Power) >>     interface. >> I've just received the development board, I wanted to test and >> confirm this before >> describing it to you, but I think it's the most sensible path forward. >> I think it will prevent future headaches and bottlenecks when the >> design is scaled, and >> creates flexibility if we find something that requires adjustment. >> >> This is high priority for me to assess and confirm. >> >> Kind regards, >> Mike >> >> >> >> >> On Sat, Jun 6, 2026 at 6:43 AM Nathan Whitehorn >> wrote: >>       Hi -- >> >>       I wanted to check in on the status of the MIST interface before >> the >>       Edmonton meeting so I can let the project office know what our >> status is >>       for the overall mainboard-interface change request. I think >> there was an >>       issue with the number of chip-select lines for the >> currently-SPI control >>       interface outstanding? >> >>       Thanks, >>       Nathan >> >>       -- >>       Nathan Whitehorn (he/him) >>       Associate Professor >>       Department of Physics and Astronomy >>       Michigan State University >>       Biomedical and Physical Sciences 3225 >>       East Lansing, MI 48824 >>       (517) 884-5563 >> >> >> -- Nathan Whitehorn (he/him) Associate Professor Department of Physics and Astronomy Michigan State University Biomedical and Physical Sciences 3225 East Lansing, MI 48824 (517) 884-5563 [ Part 2, Image/PNG (Name: "image.png") 44 KB. ] [ Unable to print this part. ] [ Part 3, Image/PNG (Name: "image.png") 716 KB. ] [ Unable to print this part. ] [ Part 4, Image/PNG (Name: "image.png") 148 KB. ] [ Unable to print this part. ] [ Part 5, Image/PNG (Name: "image.png") 29 KB. ] [ Unable to print this part. ]