Release Notes:
Version |
Date |
Details |
1.0 |
11/1/2019 |
Initial version for EAP |
1.1 |
11/25/2019 |
All register definitions converted from any having lower case register names to upper case. |
1.2 |
5/18/2021 |
SAR Updates: #119399, 119513, 118122, 117344, 119570, 112255 |
1.3 |
9/2/2021 |
SAR Update: 120991 |
1.4 |
3/10/2022 |
Update PCIE_CTRL for PERSTN Root Port Support SAR 122544, PCIE BRIDGE register updated defaults SAR 123072, Updated QSPI CONTROL register CLKRATE & SAMPLE fields per SAR 123154, Update to I2C Status register per SAR 121119 |
1.5 |
8/15/2022 |
Update PLL_CTRL2 register
description. SAR124993 Updated
FABRIC_RESET_CR Register details- SAR123606 Added lock bits information. Per JIRA-2125 |
1.6 |
3/10/2023 |
FD-256, FD-223, FD-211, SAR124581, |
Unzip the PF_SoC_RegMap_Vx_x.zip into your local disk.
Open "pfsoc_regmap.htm" with your favorite web browser, like Internet Explorer, Firefox, Chrome. etc.
"pfsoc_regmap.htm" will provide the hierarchy and subsequent register descriptions and details.