PolarFire SoC Icicle Kit Notes
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                                              Rev. 2-Aug-2023


The Icicle demo board uses a  MPFS250T-FCVG484  FPGA/CPU.


It has a  50 MHz clock oscillator  and a  125 MHz oscillator
(differential LVDS output)  which is the input to the MSS
Reference clk.


The SPI flash U43  1 Gb Micron  MT25QL01GBBB8ESF-0SIT  SPI
flash memory device connected to SPI pins on bank3 of the
PolarFire SoC device.


Page 13 says  "Bank 9 VDDI power pins are connected to Bank 1
VDDI power pins within the package substrate for pinmigration
compatibility"  -  but there is no Bank 9 in the FCVG484 part.


Page 17 says  "I2C, UART, and other GPIO signals use GPIO
BANK 1 and BANK 9".


A 50 MHz clock oscillator with an accuracy of ±10 ppm is
available on the board.  This clock oscillator is connected
to the FPGA fabric to provide a system reference clock.
The pin number of the 50 MHz oscillator is  W12,  and the pin
name is  HSIO92PB0/CLKIN_N_2/CCC_NW_CLKIN_N_2/CCC_NW_PLL1_OUT0