# Generic 16 Bit ECL <--> LVDS # # J9 J10 Pin Nets and # Terminator Resistor Pin Nets # # CB_Fan PCB Nets # --------------------- # # # Original Rev. 23-Jan-2012 # Most Recent Rev. 29-Feb-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # This file contains the J9 and J10 Connector Pin Nets # and the Terminator / Pull-Down resistor Pin Nets # at both the LVDS end and the ECL end of the # 16 Bit Generic ECL <--> LVDS converter. # J9 Connector Pin Nets ECL Connector # --------------------------------------- NET 'GC_ECL_0_DIR' J9-1 # NET 'GC_ECL_0_CMP' J9-2 # NET 'GC_ECL_1_DIR' J9-3 # NET 'GC_ECL_1_CMP' J9-4 # NET 'GC_ECL_2_DIR' J9-5 # NET 'GC_ECL_2_CMP' J9-6 # NET 'GC_ECL_3_DIR' J9-7 # NET 'GC_ECL_3_CMP' J9-8 # NET 'GC_ECL_4_DIR' J9-9 # NET 'GC_ECL_4_CMP' J9-10 # NET 'GC_ECL_5_DIR' J9-11 # NET 'GC_ECL_5_CMP' J9-12 # NET 'GC_ECL_6_DIR' J9-13 # NET 'GC_ECL_6_CMP' J9-14 # NET 'GC_ECL_7_DIR' J9-15 # NET 'GC_ECL_7_CMP' J9-16 # NET 'GC_ECL_8_DIR' J9-17 # NET 'GC_ECL_8_CMP' J9-18 # NET 'GC_ECL_9_DIR' J9-19 # NET 'GC_ECL_9_CMP' J9-20 # NET 'GC_ECL_10_DIR' J9-21 # NET 'GC_ECL_10_CMP' J9-22 # NET 'GC_ECL_11_DIR' J9-23 # NET 'GC_ECL_11_CMP' J9-24 # NET 'GC_ECL_12_DIR' J9-25 # NET 'GC_ECL_12_CMP' J9-26 # NET 'GC_ECL_13_DIR' J9-27 # NET 'GC_ECL_13_CMP' J9-28 # NET 'GC_ECL_14_DIR' J9-29 # NET 'GC_ECL_14_CMP' J9-30 # NET 'GC_ECL_15_DIR' J9-31 # NET 'GC_ECL_15_CMP' J9-32 # # J10 Connector Pin Nets LVDS Connector # ----------------------------------------- NET 'GC_LVDS_0_DIR' J10-1 # NET 'GC_LVDS_0_CMP' J10-2 # NET 'GC_LVDS_1_DIR' J10-3 # NET 'GC_LVDS_1_CMP' J10-4 # NET 'GC_LVDS_2_DIR' J10-5 # NET 'GC_LVDS_2_CMP' J10-6 # NET 'GC_LVDS_3_DIR' J10-7 # NET 'GC_LVDS_3_CMP' J10-8 # NET 'GC_LVDS_4_DIR' J10-9 # NET 'GC_LVDS_4_CMP' J10-10 # NET 'GC_LVDS_5_DIR' J10-11 # NET 'GC_LVDS_5_CMP' J10-12 # NET 'GC_LVDS_6_DIR' J10-13 # NET 'GC_LVDS_6_CMP' J10-14 # NET 'GC_LVDS_7_DIR' J10-15 # NET 'GC_LVDS_7_CMP' J10-16 # NET 'GC_LVDS_8_DIR' J10-17 # NET 'GC_LVDS_8_CMP' J10-18 # NET 'GC_LVDS_9_DIR' J10-19 # NET 'GC_LVDS_9_CMP' J10-20 # NET 'GC_LVDS_10_DIR' J10-21 # NET 'GC_LVDS_10_CMP' J10-22 # NET 'GC_LVDS_11_DIR' J10-23 # NET 'GC_LVDS_11_CMP' J10-24 # NET 'GC_LVDS_12_DIR' J10-25 # NET 'GC_LVDS_12_CMP' J10-26 # NET 'GC_LVDS_13_DIR' J10-27 # NET 'GC_LVDS_13_CMP' J10-28 # NET 'GC_LVDS_14_DIR' J10-29 # NET 'GC_LVDS_14_CMP' J10-30 # NET 'GC_LVDS_15_DIR' J10-31 # NET 'GC_LVDS_15_CMP' J10-32 # # ECL Terminator / Pull-Down Resistor Network Pin Nets # ------------------------------------------------------ NET 'GC_ECL_0_DIR' R221-3 # J9-1 NET 'GC_ECL_0_CMP' R221-4 # J9-2 NET 'GC_ECL_1_DIR' R222-3 # J9-3 NET 'GC_ECL_1_CMP' R222-4 # J9-4 NET 'GC_ECL_2_DIR' R221-5 # J9-5 NET 'GC_ECL_2_CMP' R221-6 # J9-6 NET 'GC_ECL_3_DIR' R222-5 # J9-7 NET 'GC_ECL_3_CMP' R222-6 # J9-8 NET 'GC_ECL_4_DIR' R223-3 # J9-9 NET 'GC_ECL_4_CMP' R223-4 # J9-10 NET 'GC_ECL_5_DIR' R224-3 # J9-11 NET 'GC_ECL_5_CMP' R224-4 # J9-12 NET 'GC_ECL_6_DIR' R223-5 # J9-13 NET 'GC_ECL_6_CMP' R223-6 # J9-14 NET 'GC_ECL_7_DIR' R224-5 # J9-15 NET 'GC_ECL_7_CMP' R224-6 # J9-16 NET 'GC_ECL_8_DIR' R226-4 # J9-17 NET 'GC_ECL_8_CMP' R226-3 # J9-18 NET 'GC_ECL_9_DIR' R225-4 # J9-19 NET 'GC_ECL_9_CMP' R225-3 # J9-20 NET 'GC_ECL_10_DIR' R226-6 # J9-21 NET 'GC_ECL_10_CMP' R226-5 # J9-22 NET 'GC_ECL_11_DIR' R225-6 # J9-23 NET 'GC_ECL_11_CMP' R225-5 # J9-24 NET 'GC_ECL_12_DIR' R228-4 # J9-25 NET 'GC_ECL_12_CMP' R228-3 # J9-26 NET 'GC_ECL_13_DIR' R227-4 # J9-27 NET 'GC_ECL_13_CMP' R227-3 # J9-28 NET 'GC_ECL_14_DIR' R228-6 # J9-29 NET 'GC_ECL_14_CMP' R228-5 # J9-30 NET 'GC_ECL_15_DIR' R227-6 # J9-31 NET 'GC_ECL_15_CMP' R227-5 # J9-32 NET 'VTT_2' R221-1 R222-1 R223-1 R224-1 # Vtt Pull_Down Supply NET 'VTT_2' R225-1 R226-1 R227-1 R228-1 # Vtt Pull_Down Supply # LVDS Termination Resistors # --------------------------- NET 'GC_LVDS_0_DIR' R201-1 # J10-1 NET 'GC_LVDS_0_CMP' R201-2 # J10-2 NET 'GC_LVDS_1_DIR' R202-1 # J10-3 NET 'GC_LVDS_1_CMP' R202-2 # J10-4 NET 'GC_LVDS_2_DIR' R203-1 # J10-5 NET 'GC_LVDS_2_CMP' R203-2 # J10-6 NET 'GC_LVDS_3_DIR' R204-1 # J10-7 NET 'GC_LVDS_3_CMP' R204-2 # J10-8 NET 'GC_LVDS_4_DIR' R205-1 # J10-9 NET 'GC_LVDS_4_CMP' R205-2 # J10-10 NET 'GC_LVDS_5_DIR' R206-1 # J10-11 NET 'GC_LVDS_5_CMP' R206-2 # J10-12 NET 'GC_LVDS_6_DIR' R207-1 # J10-13 NET 'GC_LVDS_6_CMP' R207-2 # J10-14 NET 'GC_LVDS_7_DIR' R208-1 # J10-15 NET 'GC_LVDS_7_CMP' R208-2 # J10-16 NET 'GC_LVDS_8_DIR' R209-1 # J10-17 NET 'GC_LVDS_8_CMP' R209-2 # J10-18 NET 'GC_LVDS_9_DIR' R210-1 # J10-19 NET 'GC_LVDS_9_CMP' R210-2 # J10-20 NET 'GC_LVDS_10_DIR' R211-1 # J10-21 NET 'GC_LVDS_10_CMP' R211-2 # J10-22 NET 'GC_LVDS_11_DIR' R212-1 # J10-23 NET 'GC_LVDS_11_CMP' R212-2 # J10-24 NET 'GC_LVDS_12_DIR' R213-1 # J10-25 NET 'GC_LVDS_12_CMP' R213-2 # J10-26 NET 'GC_LVDS_13_DIR' R214-1 # J10-27 NET 'GC_LVDS_13_CMP' R214-2 # J10-28 NET 'GC_LVDS_14_DIR' R215-1 # J10-29 NET 'GC_LVDS_14_CMP' R215-2 # J10-30 NET 'GC_LVDS_15_DIR' R216-1 # J10-31 NET 'GC_LVDS_15_CMP' R216-2 # J10-32 # Generic 16 Bit ECL <--> LVDS # # CB_Fan PCB Nets # --------------------- # # # Original Rev. 8-Dec-2010 # Most Recent Rev. 29-Feb-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # This section of the ECL <--> LVDS converter net list contains # everything except for the connector pin net connections. # Switch to using: # # DS91M040 LVDS <--> 3.3V_CMOS with a "permanently" installed # 110 Ohm terminator on its LVDS side and a 3 way jumper cap # to select LVDS-->CMOS or CMOS-->LVDS. # # 100398QC Differential_ECL <--> TTL with socketed SIP-6 # resistor packs to provide either 56 Ohm pull down to Vtt # or 110 Ohm input termination and a 3 way jumper cap to # select ECL-->TTL or TTL-->ECL. # Signal 0 NET 'GC_ECL_0_DIR' U201-24 # ECL_0 Direct I/O Signal NET 'GC_ECL_0_CMP' U201-23 # ECL_0 Complement I/O Signal NET 'GC_CMOS_TTL_0' U201-19 # 100398 TTL Port NET 'GC_LVDS_0_DIR' U205-23 # LVDS_0 Direct I/O Signal NET 'GC_LVDS_0_CMP' U205-24 # LVDS_0 Complement I/O Signal NET 'GC_CMOS_TTL_0' U205-1 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_0' U205-2 # DS91M040 LVDS Driver Input # Signal 1 NET 'GC_ECL_1_DIR' U201-26 # ECL_1 Direct I/O Signal NET 'GC_ECL_1_CMP' U201-25 # ECL_1 Complement I/O Signal NET 'GC_CMOS_TTL_1' U201-18 # 100398 TTL Port NET 'GC_LVDS_1_DIR' U205-21 # LVDS_1 Direct I/O Signal NET 'GC_LVDS_1_CMP' U205-22 # LVDS_1 Complement I/O Signal NET 'GC_CMOS_TTL_1' U205-3 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_1' U205-4 # DS91M040 LVDS Driver Input # Signal 2 NET 'GC_ECL_2_DIR' U201-4 # ECL_2 Direct I/O Signal NET 'GC_ECL_2_CMP' U201-5 # ECL_2 Complement I/O Signal NET 'GC_CMOS_TTL_2' U201-13 # 100398 TTL Port NET 'GC_LVDS_2_DIR' U205-19 # LVDS_2 Direct I/O Signal NET 'GC_LVDS_2_CMP' U205-20 # LVDS_2 Complement I/O Signal NET 'GC_CMOS_TTL_2' U205-5 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_2' U205-6 # DS91M040 LVDS Driver Input # Signal 3 NET 'GC_ECL_3_DIR' U201-6 # ECL_3 Direct I/O Signal NET 'GC_ECL_3_CMP' U201-7 # ECL_3 Complement I/O Signal NET 'GC_CMOS_TTL_3' U201-12 # 100398 TTL Port NET 'GC_LVDS_3_DIR' U205-17 # LVDS_3 Direct I/O Signal NET 'GC_LVDS_3_CMP' U205-18 # LVDS_3 Complement I/O Signal NET 'GC_CMOS_TTL_3' U205-7 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_3' U205-8 # DS91M040 LVDS Driver Input # Signal 4 NET 'GC_ECL_4_DIR' U202-24 # ECL_4 Direct I/O Signal NET 'GC_ECL_4_CMP' U202-23 # ECL_4 Complement I/O Signal NET 'GC_CMOS_TTL_4' U202-19 # 100398 TTL Port NET 'GC_LVDS_4_DIR' U206-23 # LVDS_4 Direct I/O Signal NET 'GC_LVDS_4_CMP' U206-24 # LVDS_4 Complement I/O Signal NET 'GC_CMOS_TTL_4' U206-1 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_4' U206-2 # DS91M040 LVDS Driver Input # Signal 5 NET 'GC_ECL_5_DIR' U202-26 # ECL_5 Direct I/O Signal NET 'GC_ECL_5_CMP' U202-25 # ECL_5 Complement I/O Signal NET 'GC_CMOS_TTL_5' U202-18 # 100398 TTL Port NET 'GC_LVDS_5_DIR' U206-21 # LVDS_5 Direct I/O Signal NET 'GC_LVDS_5_CMP' U206-22 # LVDS_5 Complement I/O Signal NET 'GC_CMOS_TTL_5' U206-3 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_5' U206-4 # DS91M040 LVDS Driver Input # Signal 6 NET 'GC_ECL_6_DIR' U202-4 # ECL_6 Direct I/O Signal NET 'GC_ECL_6_CMP' U202-5 # ECL_6 Complement I/O Signal NET 'GC_CMOS_TTL_6' U202-13 # 100398 TTL Port NET 'GC_LVDS_6_DIR' U206-19 # LVDS_6 Direct I/O Signal NET 'GC_LVDS_6_CMP' U206-20 # LVDS_6 Complement I/O Signal NET 'GC_CMOS_TTL_6' U206-5 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_6' U206-6 # DS91M040 LVDS Driver Input # Signal 7 NET 'GC_ECL_7_DIR' U202-6 # ECL_7 Direct I/O Signal NET 'GC_ECL_7_CMP' U202-7 # ECL_7 Complement I/O Signal NET 'GC_CMOS_TTL_7' U202-12 # 100398 TTL Port NET 'GC_LVDS_7_DIR' U206-17 # LVDS_7 Direct I/O Signal NET 'GC_LVDS_7_CMP' U206-18 # LVDS_7 Complement I/O Signal NET 'GC_CMOS_TTL_7' U206-7 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_7' U206-8 # DS91M040 LVDS Driver Input # Signal 8 NET 'GC_ECL_8_DIR' U203-24 # ECL_8 Direct I/O Signal NET 'GC_ECL_8_CMP' U203-23 # ECL_8 Complement I/O Signal NET 'GC_CMOS_TTL_8' U203-19 # 100398 TTL Port NET 'GC_LVDS_8_DIR' U207-23 # LVDS_8 Direct I/O Signal NET 'GC_LVDS_8_CMP' U207-24 # LVDS_8 Complement I/O Signal NET 'GC_CMOS_TTL_8' U207-1 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_8' U207-2 # DS91M040 LVDS Driver Input # Signal 9 NET 'GC_ECL_9_DIR' U203-26 # ECL_9 Direct I/O Signal NET 'GC_ECL_9_CMP' U203-25 # ECL_9 Complement I/O Signal NET 'GC_CMOS_TTL_9' U203-18 # 100398 TTL Port NET 'GC_LVDS_9_DIR' U207-21 # LVDS_9 Direct I/O Signal NET 'GC_LVDS_9_CMP' U207-22 # LVDS_9 Complement I/O Signal NET 'GC_CMOS_TTL_9' U207-3 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_9' U207-4 # DS91M040 LVDS Driver Input # Signal 10 NET 'GC_ECL_10_DIR' U203-4 # ECL_10 Direct I/O Signal NET 'GC_ECL_10_CMP' U203-5 # ECL_10 Complement I/O Signal NET 'GC_CMOS_TTL_10' U203-13 # 100398 TTL Port NET 'GC_LVDS_10_DIR' U207-19 # LVDS_10 Direct I/O Signal NET 'GC_LVDS_10_CMP' U207-20 # LVDS_10 Complement I/O Signal NET 'GC_CMOS_TTL_10' U207-5 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_10' U207-6 # DS91M040 LVDS Driver Input # Signal 11 NET 'GC_ECL_11_DIR' U203-6 # ECL_11 Direct I/O Signal NET 'GC_ECL_11_CMP' U203-7 # ECL_11 Complement I/O Signal NET 'GC_CMOS_TTL_11' U203-12 # 100398 TTL Port NET 'GC_LVDS_11_DIR' U207-17 # LVDS_11 Direct I/O Signal NET 'GC_LVDS_11_CMP' U207-18 # LVDS_11 Complement I/O Signal NET 'GC_CMOS_TTL_11' U207-7 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_11' U207-8 # DS91M040 LVDS Driver Input # Signal 12 NET 'GC_ECL_12_DIR' U204-24 # ECL_12 Direct I/O Signal NET 'GC_ECL_12_CMP' U204-23 # ECL_12 Complement I/O Signal NET 'GC_CMOS_TTL_12' U204-19 # 100398 TTL Port NET 'GC_LVDS_12_DIR' U208-23 # LVDS_12 Direct I/O Signal NET 'GC_LVDS_12_CMP' U208-24 # LVDS_12 Complement I/O Signal NET 'GC_CMOS_TTL_12' U208-1 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_12' U208-2 # DS91M040 LVDS Driver Input # Signal 13 NET 'GC_ECL_13_DIR' U204-26 # ECL_13 Direct I/O Signal NET 'GC_ECL_13_CMP' U204-25 # ECL_13 Complement I/O Signal NET 'GC_CMOS_TTL_13' U204-18 # 100398 TTL Port NET 'GC_LVDS_13_DIR' U208-21 # LVDS_13 Direct I/O Signal NET 'GC_LVDS_13_CMP' U208-22 # LVDS_13 Complement I/O Signal NET 'GC_CMOS_TTL_13' U208-3 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_13' U208-4 # DS91M040 LVDS Driver Input # Signal 14 NET 'GC_ECL_14_DIR' U204-4 # ECL_14 Direct I/O Signal NET 'GC_ECL_14_CMP' U204-5 # ECL_14 Complement I/O Signal NET 'GC_CMOS_TTL_14' U204-13 # 100398 TTL Port NET 'GC_LVDS_14_DIR' U208-19 # LVDS_14 Direct I/O Signal NET 'GC_LVDS_14_CMP' U208-20 # LVDS_14 Complement I/O Signal NET 'GC_CMOS_TTL_14' U208-5 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_14' U208-6 # DS91M040 LVDS Driver Input # Signal 15 NET 'GC_ECL_15_DIR' U204-6 # ECL_15 Direct I/O Signal NET 'GC_ECL_15_CMP' U204-7 # ECL_15 Complement I/O Signal NET 'GC_CMOS_TTL_15' U204-12 # 100398 TTL Port NET 'GC_LVDS_15_DIR' U208-17 # LVDS_15 Direct I/O Signal NET 'GC_LVDS_15_CMP' U208-18 # LVDS_15 Complement I/O Signal NET 'GC_CMOS_TTL_15' U208-7 # DS91M040 LVDS Receiver Output NET 'GC_CMOS_TTL_15' U208-8 # DS91M040 LVDS Driver Input # ECL-->LVDS or LVDS-->ECL Direction Control # 100398QC Direction Control HI --> TTL In ECL Out # LOW --> ECL In TTL Out NET 'DIR_CTRL_398' U201-10 U202-10 # 100398 Direction Control NET 'DIR_CTRL_398' U203-10 U204-10 # DS91M040 Direction Control HI --> CMOS In LVDS Out # LOW --> LVDS In CMOS Out NET 'DIR_CTRL_040' U205-13 U205-14 U205-15 U205-16 # DS91M040 NET 'DIR_CTRL_040' U205-25 U205-26 U205-27 U205-28 # NET 'DIR_CTRL_040' U206-13 U206-14 U206-15 U206-16 # Direction NET 'DIR_CTRL_040' U206-25 U206-26 U206-27 U206-28 # NET 'DIR_CTRL_040' U207-13 U207-14 U207-15 U207-16 # Control NET 'DIR_CTRL_040' U207-25 U207-26 U207-27 U207-28 # NET 'DIR_CTRL_040' U208-13 U208-14 U208-15 U208-16 # DS91M040 NET 'DIR_CTRL_040' U208-25 U208-26 U208-27 U208-28 # # Direction Control Signal Generation NET 'VDD' J231-1 # Jumper position for ECL --> LVDS NET 'GROUND' J231-3 # Jumper position for LVDS --> ECL NET 'DIR_CTRL_040' J231-2 # DS91M040 Direction Control NET 'VDD' R235-1 # Default Direction Setting Resistor NET 'DIR_CTRL_040' R235-2 NET 'DIR_CTRL_040' R236-1 # DS91M040 Dir Ctrl to Base Resistor NET 'TRANS_BASE' R236-2 Q231-1 NET 'DIR_CTRL_398' R237-2 Q231-3 # 100398 Dir Ctrl, Trans Col, Pull-Up NET 'VCC' R237-1 # 100398 Dir Ctrl Pull-Up to Vcc NET 'GROUND' Q231-2 # 100398 Dir Driver Transistor Emitter # Enable the Vtt Converter "K3" when doing LVDS to Diff_Ecl NET 'DIR_CTRL_040' R238-1 # DS91M040 Dir Ctrl to NET 'Q232_BASE' R238-2 Q232-1 # Q232 Base Resistor and Q232 Base NET 'ENB_K3_CONV' K3-3 Q232-3 # Q232 Collector to Converter K3 INH pin NET 'GROUND' Q232-2 # Ground Q232's Emitter # DS91M040 MDE Control # # Set MDE HI to power-up for normal operation. NET 'MDE_040' U205-10 U206-10 U207-10 U208-10 # DS91M040 MDE NET 'MDE_040' R231-2 # MDE Pull-Up to Vdd NET 'VDD' R231-1 # DS91M040 FSEN1 & FSEN2 Control # # Set FSEN1 & FSEN2 both LOW for normal Type 1 Receiver operation. NET 'FSEN_040' U205-32 U206-32 U207-32 U208-32 # DS91M040 FSEN1 NET 'FSEN_040' U205-9 U206-9 U207-9 U208-9 # DS91M040 FSEN2 NET 'FSEN_040' R232-2 # FSEN Pull-Down NET 'GROUND' R232-1 # 100398 LE Control # # Set Latch Enable Pulled LOW to make the 100398 latch Transparent. NET 'LE_398' U201-21 U202-21 U203-21 U204-21 # 100398 LE NET 'LE_398' R233-2 # LE Pull-Down NET 'GROUND' R233-1 # 100398 Output Enable Control # # Set OE Pulled HI to enable outputs either ECL or TTL. NET 'OE_398' U201-9 U202-9 U203-9 U204-9 # 100398 OE NET 'OE_398' R234-2 # OE Pull-Up to Vcc NET 'VCC' R234-1 # # CB_Fan PCB Nets # # Control Signal LVDS Receive & Fanout Nets # ------------------------------------------- # # # Original Rev. 24-Jan-2012 # Most Recent Rev. 16-Apr-2012 # # # # This file is for the 8 Control Bus version of the CB-Fan card. # # # This section of the CB-Fan net list receives the 4 Control Signal: # CRST, TRIG, CLR, and CLK from the Control H-Clk card and fans # them out to the sections that drive the 16 Control Busses. # Receive CRST by a DS90LV110T chip U1 and terminate the signal NET 'CRST_IN_DIR' J6-1 R1-2 # CRST Input Signal Direct NET 'CRST_IN_CMP' J6-2 R1-1 # CRST Input Signal Complement NET 'CRST_IN_DIR' U1-7 # CRST Input Signal Direct NET 'CRST_IN_CMP' U1-8 # CRST Input Signal Complement NET 'CRST_1_DIST_DIR' U1-11 # CRST Distribute 1 Direct NET 'CRST_1_DIST_CMP' U1-12 # CRST Distribute 1 Complement NET 'CRST_2_DIST_DIR' U1-13 # CRST Distribute 2 Direct NET 'CRST_2_DIST_CMP' U1-14 # CRST Distribute 2 Complement NET 'CRST_3_DIST_DIR' U1-16 # CRST Distribute 3 Direct NET 'CRST_3_DIST_CMP' U1-15 # CRST Distribute 3 Complement NET 'CRST_4_DIST_DIR' U1-18 # CRST Distribute 4 Direct NET 'CRST_4_DIST_CMP' U1-17 # CRST Distribute 4 Complement NET 'CRST_5_DIST_DIR' U1-20 # CRST Distribute 5 Direct NET 'CRST_5_DIST_CMP' U1-19 # CRST Distribute 5 Complement NET 'CRST_6_DIST_DIR' U1-24 # CRST Distribute 6 Direct NET 'CRST_6_DIST_CMP' U1-23 # CRST Distribute 6 Complement NET 'CRST_7_DIST_DIR' U1-26 # CRST Distribute 7 Direct NET 'CRST_7_DIST_CMP' U1-25 # CRST Distribute 7 Complement NET 'CRST_8_DIST_DIR' U1-28 # CRST Distribute 8 Direct NET 'CRST_8_DIST_CMP' U1-27 # CRST Distribute 8 Complement NET 'CRST_9_DIST_DIR' U1-1 # CRST Distribute 9 Direct NET 'CRST_9_DIST_CMP' U1-2 # CRST Distribute 9 Complement NET 'CRST_10_DIST_DIR' U1-3 # CRST Distribute 10 Direct NET 'CRST_10_DIST_CMP' U1-4 # CRST Distribute 10 Complement # Receive TRIG by a DS90LV110T chip U2 and terminate the signal NET 'TRIG_IN_DIR' J6-3 R2-2 # TRIG Input Signal Direct NET 'TRIG_IN_CMP' J6-4 R2-1 # TRIG Input Signal Complement NET 'TRIG_IN_DIR' U2-7 # TRIG Input Signal Direct NET 'TRIG_IN_CMP' U2-8 # TRIG Input Signal Complement NET 'TRIG_1_DIST_DIR' U2-11 # TRIG Distribute 1 Direct NET 'TRIG_1_DIST_CMP' U2-12 # TRIG Distribute 1 Complement NET 'TRIG_2_DIST_DIR' U2-13 # TRIG Distribute 2 Direct NET 'TRIG_2_DIST_CMP' U2-14 # TRIG Distribute 2 Complement NET 'TRIG_3_DIST_DIR' U2-16 # TRIG Distribute 3 Direct NET 'TRIG_3_DIST_CMP' U2-15 # TRIG Distribute 3 Complement NET 'TRIG_4_DIST_DIR' U2-18 # TRIG Distribute 4 Direct NET 'TRIG_4_DIST_CMP' U2-17 # TRIG Distribute 4 Complement NET 'TRIG_5_DIST_DIR' U2-20 # TRIG Distribute 5 Direct NET 'TRIG_5_DIST_CMP' U2-19 # TRIG Distribute 5 Complement NET 'TRIG_6_DIST_DIR' U2-24 # TRIG Distribute 6 Direct NET 'TRIG_6_DIST_CMP' U2-23 # TRIG Distribute 6 Complement NET 'TRIG_7_DIST_DIR' U2-26 # TRIG Distribute 7 Direct NET 'TRIG_7_DIST_CMP' U2-25 # TRIG Distribute 7 Complement NET 'TRIG_8_DIST_DIR' U2-28 # TRIG Distribute 8 Direct NET 'TRIG_8_DIST_CMP' U2-27 # TRIG Distribute 8 Complement NET 'TRIG_9_DIST_DIR' U2-1 # TRIG Distribute 9 Direct NET 'TRIG_9_DIST_CMP' U2-2 # TRIG Distribute 9 Complement NET 'TRIG_10_DIST_DIR' U2-3 # TRIG Distribute 10 Direct NET 'TRIG_10_DIST_CMP' U2-4 # TRIG Distribute 10 Complement # Receive CLR by a DS90LV110T chip U3 and terminate the signal NET 'CLR_IN_DIR' J6-5 R3-2 # CLR Input Signal Direct NET 'CLR_IN_CMP' J6-6 R3-1 # CLR Input Signal Complement NET 'CLR_IN_DIR' U3-7 # CLR Input Signal Direct NET 'CLR_IN_CMP' U3-8 # CLR Input Signal Complement NET 'CLR_1_DIST_DIR' U3-11 # CLR Distribute 1 Direct NET 'CLR_1_DIST_CMP' U3-12 # CLR Distribute 1 Complement NET 'CLR_2_DIST_DIR' U3-13 # CLR Distribute 2 Direct NET 'CLR_2_DIST_CMP' U3-14 # CLR Distribute 2 Complement NET 'CLR_3_DIST_DIR' U3-16 # CLR Distribute 3 Direct NET 'CLR_3_DIST_CMP' U3-15 # CLR Distribute 3 Complement NET 'CLR_4_DIST_DIR' U3-18 # CLR Distribute 4 Direct NET 'CLR_4_DIST_CMP' U3-17 # CLR Distribute 4 Complement NET 'CLR_5_DIST_DIR' U3-20 # CLR Distribute 5 Direct NET 'CLR_5_DIST_CMP' U3-19 # CLR Distribute 5 Complement NET 'CLR_6_DIST_DIR' U3-24 # CLR Distribute 6 Direct NET 'CLR_6_DIST_CMP' U3-23 # CLR Distribute 6 Complement NET 'CLR_7_DIST_DIR' U3-26 # CLR Distribute 7 Direct NET 'CLR_7_DIST_CMP' U3-25 # CLR Distribute 7 Complement NET 'CLR_8_DIST_DIR' U3-28 # CLR Distribute 8 Direct NET 'CLR_8_DIST_CMP' U3-27 # CLR Distribute 8 Complement NET 'CLR_9_DIST_DIR' U3-1 # CLR Distribute 9 Direct NET 'CLR_9_DIST_CMP' U3-2 # CLR Distribute 9 Complement NET 'CLR_10_DIST_DIR' U3-3 # CLR Distribute 10 Direct NET 'CLR_10_DIST_CMP' U3-4 # CLR Distribute 10 Complement # Receive CLK by a DS90LV110T chip U4 and terminate the signal NET 'CLK_IN_DIR' J5-33 R4-2 # CLK Input Signal Direct NET 'CLK_IN_CMP' J5-34 R4-1 # CLK Input Signal Complement NET 'CLK_IN_DIR' U4-7 # CLK Input Signal Direct NET 'CLK_IN_CMP' U4-8 # CLK Input Signal Complement NET 'CLK_1_DIST_DIR' U4-11 # CLK Distribute 1 Direct NET 'CLK_1_DIST_CMP' U4-12 # CLK Distribute 1 Complement NET 'CLK_2_DIST_DIR' U4-13 # CLK Distribute 2 Direct NET 'CLK_2_DIST_CMP' U4-14 # CLK Distribute 2 Complement NET 'CLK_3_DIST_DIR' U4-16 # CLK Distribute 3 Direct NET 'CLK_3_DIST_CMP' U4-15 # CLK Distribute 3 Complement NET 'CLK_4_DIST_DIR' U4-18 # CLK Distribute 4 Direct NET 'CLK_4_DIST_CMP' U4-17 # CLK Distribute 4 Complement NET 'CLK_5_DIST_DIR' U4-20 # CLK Distribute 5 Direct NET 'CLK_5_DIST_CMP' U4-19 # CLK Distribute 5 Complement NET 'CLK_6_DIST_DIR' U4-24 # CLK Distribute 6 Direct NET 'CLK_6_DIST_CMP' U4-23 # CLK Distribute 6 Complement NET 'CLK_7_DIST_DIR' U4-26 # CLK Distribute 7 Direct NET 'CLK_7_DIST_CMP' U4-25 # CLK Distribute 7 Complement NET 'CLK_8_DIST_DIR' U4-28 # CLK Distribute 8 Direct NET 'CLK_8_DIST_CMP' U4-27 # CLK Distribute 8 Complement NET 'CLK_9_DIST_DIR' U4-1 # CLK Distribute 9 Direct NET 'CLK_9_DIST_CMP' U4-2 # CLK Distribute 9 Complement NET 'CLK_10_DIST_DIR' U4-3 # CLK Distribute 10 Direct NET 'CLK_10_DIST_CMP' U4-4 # CLK Distribute 10 Complement # Note: that the CLK signal comes from J5 pins 33-34. # J6 pins 7-8 is the Load Next Event signal # for the Scaler System. # There are vias by U2 and U4 to make available copies # of the TRG and CLK signals just in case they are needed # in an emergency in the future. # V1 & V2 provide an LVDS copy of the CLK signal. # V3 & V4 provide an LVDS copy of the TRG signal. NET 'CLK_10_DIST_DIR' V1-1 # CLK Distribute 10 Direct NET 'CLK_10_DIST_CMP' V2-1 # CLK Distribute 10 Complement NET 'TRIG_10_DIST_DIR' V3-1 # TRIG Distribute 10 Direct NET 'TRIG_10_DIST_CMP' V4-1 # TRIG Distribute 10 Complement # # Almost-Full Nets # # CB_Fan PCB Nets # --------------------- # # # Original Rev. 20-Jan-2012 # Most Recent Rev. 11-Apr-2012 # # # This file is for the 8 Control Bus version of the CB-Fan card. # # This file defines the Almost-Full nets on the CB-Fan card. # These are signals flowing back to the Control H-Clk card. # # Recall that on connector J5 that carries signals back to the # H-Clk card, that the Almost_Full_2 signals and the SBC_n_Busy # signals share pins. # # The jumpers R101:R116 are used to either connect or disconnect # the Almost_Full_2 signals from these pins on J5. # Almost-Full-1 from C-Bus # ------------------------ NET 'ALMOST_FULL_1_1_DIR' J1-13 J5-1 # Control Bus No. 1 NET 'ALMOST_FULL_1_1_CMP' J1-14 J5-2 NET 'ALMOST_FULL_1_2_DIR' J2-13 J5-5 # Control Bus No. 2 NET 'ALMOST_FULL_1_2_CMP' J2-14 J5-6 NET 'ALMOST_FULL_1_3_DIR' J3-13 J5-9 # Control Bus No. 3 NET 'ALMOST_FULL_1_3_CMP' J3-14 J5-10 NET 'ALMOST_FULL_1_4_DIR' J3-29 J5-13 # Control Bus No. 4 NET 'ALMOST_FULL_1_4_CMP' J3-30 J5-14 NET 'ALMOST_FULL_1_5_DIR' J3-45 J5-17 # Control Bus No. 5 NET 'ALMOST_FULL_1_5_CMP' J3-46 J5-18 NET 'ALMOST_FULL_1_6_DIR' J4-13 J5-21 # Control Bus No. 6 NET 'ALMOST_FULL_1_6_CMP' J4-14 J5-22 NET 'ALMOST_FULL_1_7_DIR' J4-29 J5-25 # Control Bus No. 7 NET 'ALMOST_FULL_1_7_CMP' J4-30 J5-26 NET 'ALMOST_FULL_1_8_DIR' J4-45 J5-29 # Control Bus No. 8 NET 'ALMOST_FULL_1_8_CMP' J4-46 J5-30 # Almost-Full-2 from C-Bus # ------------------------ NET 'ALMOST_FULL_2_1_DIR' J1-15 R114-1 # Control Bus No. 1 NET 'ALMOST_FULL_2_1_CMP' J1-16 R113-1 # Almost Full 2 NET 'AMF_2_1_SBC_1_BZ_DIR' R114-2 J5-3 # Almost Full 2 CB 1 or NET 'AMF_2_1_SBC_1_BZ_CMP' R113-2 J5-4 # SBC 1 Busy NET 'ALMOST_FULL_2_2_DIR' J2-15 R116-1 # Control Bus No. 2 NET 'ALMOST_FULL_2_2_CMP' J2-16 R115-1 # Almost Full 2 NET 'AMF_2_2_SBC_2_BZ_DIR' R116-2 J5-7 # Almost Full 2 CB 2 or NET 'AMF_2_2_SBC_2_BZ_CMP' R115-2 J5-8 # SBC 2 Busy NET 'ALMOST_FULL_2_3_DIR' J3-15 R101-2 # Control Bus No. 3 NET 'ALMOST_FULL_2_3_CMP' J3-16 R102-2 # Almost Full 2 NET 'AMF_2_3_SBC_3_BZ_DIR' R101-1 J5-11 # Almost Full 2 CB 3 or NET 'AMF_2_3_SBC_3_BZ_CMP' R102-1 J5-12 # SBC 3 Busy NET 'ALMOST_FULL_2_4_DIR' J3-31 R103-2 # Control Bus No. 4 NET 'ALMOST_FULL_2_4_CMP' J3-32 R104-2 # Almost Full 2 NET 'AMF_2_4_SBC_4_BZ_DIR' R103-1 J5-15 # Almost Full 2 CB 4 or NET 'AMF_2_4_SBC_4_BZ_CMP' R104-1 J5-16 # SBC 4 Busy NET 'ALMOST_FULL_2_5_DIR' J3-47 R105-2 # Control Bus No. 5 NET 'ALMOST_FULL_2_5_CMP' J3-48 R106-2 # Almost Full 2 NET 'AMF_2_5_SBC_5_BZ_DIR' R105-1 J5-19 # Almost Full 2 CB 5 or NET 'AMF_2_5_SBC_5_BZ_CMP' R106-1 J5-20 # SBC 5 Busy NET 'ALMOST_FULL_2_6_DIR' J4-15 R107-2 # Control Bus No. 6 NET 'ALMOST_FULL_2_6_CMP' J4-16 R108-2 # Almost Full 2 NET 'AMF_2_6_SBC_6_BZ_DIR' R107-1 J5-23 # Almost Full 2 CB 6 or NET 'AMF_2_6_SBC_6_BZ_CMP' R108-1 J5-24 # SBC 6 Busy NET 'ALMOST_FULL_2_7_DIR' J4-31 R109-2 # Control Bus No. 7 NET 'ALMOST_FULL_2_7_CMP' J4-32 R110-2 # Almost Full 2 NET 'AMF_2_7_SBC_7_BZ_DIR' R109-1 J5-27 # Almost Full 2 CB 7 or NET 'AMF_2_7_SBC_7_BZ_CMP' R110-1 J5-28 # SBC 7 Busy NET 'ALMOST_FULL_2_8_DIR' J4-47 R111-2 # Control Bus No. 8 NET 'ALMOST_FULL_2_8_CMP' J4-48 R112-2 # Almost Full 2 NET 'AMF_2_8_SBC_8_BZ_DIR' R111-1 J5-31 # Almost Full 2 CB 8 or NET 'AMF_2_8_SBC_8_BZ_CMP' R112-1 J5-32 # SBC 8 Busy # Note that pins 33 & 34 of J5 bring the 40 MHz clock signal # from the Control H-Clk card to the CB-Fan card. # # Almost Full Signals from the Scaler Control Bus on J8 # NET 'FULL_1_SCLR_OR_GPIN_1_DIR' J8-13 J7-1 # Scaler Control Bus NET 'FULL_1_SCLR_OR_GPIN_1_CMP' J8-14 J7-2 NET 'FULL_2_SCLR_OR_GPIN_2_DIR' J8-15 J7-3 # Scaler Control Bus NET 'FULL_2_SCLR_OR_GPIN_2_CMP' J8-16 J7-4 # CB_Fan PCB Nets # # Drive the J1 and J2 Connector Control Signals # ----------------------------------------------- # # # Original Rev. 24-Jan-2012 # Most Recent Rev. 9-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # J1 is the connector for Control Bus #1 # J2 is the connector for Control Bus #2 # # This section of the CB-Fan net list drives the 4 Control Signals: # CRST, TRIG, CLR, and CLK on to the J1 and J2 Control Bus connectors. # # These are the 2 LVDS versions of the Control Bus per CB-Fan card. # Drive CRST to Control Busses #1 and #2 on the connectors J1 and J2 NET 'CRST_1_DIST_DIR' J2-1 # CRST DIR Out 1 NET 'CRST_1_DIST_CMP' J2-2 # CRST CMP Out 1 NET 'CRST_2_DIST_DIR' J1-1 # CRST DIR Out 2 NET 'CRST_2_DIST_CMP' J1-2 # CRST CMP Out 2 # Drive TRIG to Control Busses #1 and #2 on the connectors J1 and J2 NET 'TRIG_1_DIST_DIR' J2-3 # TRIG DIR Out 1 NET 'TRIG_1_DIST_CMP' J2-4 # TRIG CMP Out 1 NET 'TRIG_2_DIST_DIR' J1-3 # TRIG DIR Out 2 NET 'TRIG_2_DIST_CMP' J1-4 # TRIG CMP Out 2 # Drive CLR to Control Busses #1 and #2 on the connectors J1 and J2 NET 'CLR_1_DIST_DIR' J2-5 # CLR DIR Out 1 NET 'CLR_1_DIST_CMP' J2-6 # CLR CMP Out 1 NET 'CLR_2_DIST_DIR' J1-5 # CLR DIR Out 2 NET 'CLR_2_DIST_CMP' J1-6 # CLR CMP Out 2 # Drive CLK to Control Busses #1 and #2 on the connectors J1 and J2 NET 'CLK_1_DIST_DIR' J2-7 # CLK DIR Out 1 NET 'CLK_1_DIST_CMP' J2-8 # CLK CMP Out 1 NET 'CLK_2_DIST_DIR' J1-7 # CLK DIR Out 2 NET 'CLK_2_DIST_CMP' J1-8 # CLK CMP Out 2 # # CB_Fan PCB Nets # # Drive the J3 Connector Control Signals # ---------------------------------------- # # # Original Rev. 24-Jan-2012 # Most Recent Rev. 12-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # J3 is the connector for Control Busses: 3, 4, and 5 # # Control Busses: 3, 4, 5 are ECL Control Busses. # # This section of the CB-Fan net list drives the 4 Control # Signals: CRST, TRIG, CLR, and CLK on to the J3 Control # Bus connector. # Drive CRST to 3 Control Busses on the J3 Connector NET 'CRST_3_DIST_DIR' U21-8 # CRST Distribute 3 Direct NET 'CRST_3_DIST_CMP' U21-7 # CRST Distribute 3 Complement NET 'CRST_3_CMOS_ECL' U27-18 U21-2 # CRST Dist 3 CMOS to ECL NET 'CRST_3_ECL_OUT_DIR' U27-21 J3-1 R21-2 # CRST DIR Out 3 NET 'CRST_3_ECL_OUT_CMP' U27-23 J3-2 R22-1 # CRST CMP Out 3 NET 'CRST_4_DIST_DIR' U23-8 # CRST Distribute 4 Direct NET 'CRST_4_DIST_CMP' U23-7 # CRST Distribute 4 Complement NET 'CRST_4_CMOS_ECL' U27-12 U23-2 # CRST Dist 4 CMOS to ECL NET 'CRST_4_ECL_OUT_DIR' U27-7 J3-17 R29-2 # CRST DIR Out 4 NET 'CRST_4_ECL_OUT_CMP' U27-6 J3-18 R30-1 # CRST CMP Out 4 NET 'CRST_5_DIST_DIR' U25-8 # CRST Distribute 5 Direct NET 'CRST_5_DIST_CMP' U25-7 # CRST Distribute 5 Complement NET 'CRST_5_CMOS_ECL' U28-20 U25-2 # CRST Dist 5 CMOS to ECL NET 'CRST_5_ECL_OUT_DIR' U28-27 J3-33 R37-2 # CRST DIR Out 5 NET 'CRST_5_ECL_OUT_CMP' U28-26 J3-34 R38-1 # CRST CMP Out 5 # Drive TRIG to 3 Control Busses on the J3 Connector NET 'TRIG_3_DIST_DIR' U21-6 # TRIG Distribute 3 Direct NET 'TRIG_3_DIST_CMP' U21-5 # TRIG Distribute 3 Complement NET 'TRIG_3_CMOS_ECL' U27-19 U21-3 # TRIG Dist 3 CMOS to ECL NET 'TRIG_3_ECL_OUT_DIR' U27-24 J3-3 R23-2 # TRIG DIR Out 3 NET 'TRIG_3_ECL_OUT_CMP' U27-25 J3-4 R24-1 # TRIG CMP Out 3 NET 'TRIG_4_DIST_DIR' U23-6 # TRIG Distribute 4 Direct NET 'TRIG_4_DIST_CMP' U23-5 # TRIG Distribute 4 Complement NET 'TRIG_4_CMOS_ECL' U27-11 U23-3 # TRIG Dist 4 CMOS to ECL NET 'TRIG_4_ECL_OUT_DIR' U27-10 J3-19 R31-2 # TRIG DIR Out 4 NET 'TRIG_4_ECL_OUT_CMP' U27-9 J3-20 R32-1 # TRIG CMP Out 4 NET 'TRIG_5_DIST_DIR' U25-6 # TRIG Distribute 5 Direct NET 'TRIG_5_DIST_CMP' U25-5 # TRIG Distribute 5 Complement NET 'TRIG_5_CMOS_ECL' U28-13 U25-3 # TRIG Dist 5 CMOS to ECL NET 'TRIG_5_ECL_OUT_DIR' U28-4 J3-35 R39-2 # TRIG DIR Out 5 NET 'TRIG_5_ECL_OUT_CMP' U28-5 J3-36 R40-1 # TRIG CMP Out 5 # Drive CLR to 3 Control Busses on the J3 Connector NET 'CLR_3_DIST_DIR' U22-8 # CLR Distribute 3 Direct NET 'CLR_3_DIST_CMP' U22-7 # CLR Distribute 3 Complement NET 'CLR_3_CMOS_ECL' U27-20 U22-2 # CLR Dist 3 CMOS to ECL NET 'CLR_3_ECL_OUT_DIR' U27-27 J3-5 R25-2 # CLR DIR Out 3 NET 'CLR_3_ECL_OUT_CMP' U27-26 J3-6 R26-1 # CLR CMP Out 3 NET 'CLR_4_DIST_DIR' U24-8 # CLR Distribute 4 Direct NET 'CLR_4_DIST_CMP' U24-7 # CLR Distribute 4 Complement NET 'CLR_4_CMOS_ECL' U28-18 U24-2 # CLR Dist 4 CMOS to ECL NET 'CLR_4_ECL_OUT_DIR' U28-21 J3-21 R33-2 # CLR DIR Out 4 NET 'CLR_4_ECL_OUT_CMP' U28-23 J3-22 R34-1 # CLR CMP Out 4 NET 'CLR_5_DIST_DIR' U26-8 # CLR Distribute 5 Direct NET 'CLR_5_DIST_CMP' U26-7 # CLR Distribute 5 Complement NET 'CLR_5_CMOS_ECL' U28-12 U26-2 # CLR Dist 5 CMOS to ECL NET 'CLR_5_ECL_OUT_DIR' U28-7 J3-37 R41-2 # CLR DIR Out 5 NET 'CLR_5_ECL_OUT_CMP' U28-6 J3-38 R42-1 # CLR CMP Out 5 # Drive CLK to 3 Control Busses on the J3 Connector NET 'CLK_3_DIST_DIR' U22-6 # CLK Distribute 3 Direct NET 'CLK_3_DIST_CMP' U22-5 # CLK Distribute 3 Complement NET 'CLK_3_CMOS_ECL' U27-13 U22-3 # CLK Dist 3 CMOS to ECL NET 'CLK_3_ECL_OUT_DIR' U27-4 J3-7 R27-2 # CLK DIR Out 3 NET 'CLK_3_ECL_OUT_CMP' U27-5 J3-8 R28-1 # CLK CMP Out 3 NET 'CLK_4_DIST_DIR' U24-6 # CLK Distribute 4 Direct NET 'CLK_4_DIST_CMP' U24-5 # CLK Distribute 4 Complement NET 'CLK_4_CMOS_ECL' U28-19 U24-3 # CLK Dist 4 CMOS to ECL NET 'CLK_4_ECL_OUT_DIR' U28-24 J3-23 R35-2 # CLK DIR Out 4 NET 'CLK_4_ECL_OUT_CMP' U28-25 J3-24 R36-1 # CLK CMP Out 4 NET 'CLK_5_DIST_DIR' U26-6 # CLK Distribute 5 Direct NET 'CLK_5_DIST_CMP' U26-5 # CLK Distribute 5 Complement NET 'CLK_5_CMOS_ECL' U28-11 U26-3 # CLK Dist 5 CMOS to ECL NET 'CLK_5_ECL_OUT_DIR' U28-10 J3-39 R43-2 # CLK DIR Out 5 NET 'CLK_5_ECL_OUT_CMP' U28-9 J3-40 R44-1 # CLK CMP Out 5 # Connect the ECL Pull Down Resistors to the Vtt Supply NET 'VTT_1' R21-1 R22-2 NET 'VTT_1' R23-1 R24-2 NET 'VTT_1' R25-1 R26-2 NET 'VTT_1' R27-1 R28-2 NET 'VTT_1' R29-1 R30-2 NET 'VTT_1' R31-1 R32-2 NET 'VTT_1' R33-1 R34-2 NET 'VTT_1' R35-1 R36-2 NET 'VTT_1' R37-1 R38-2 NET 'VTT_1' R39-1 R40-2 NET 'VTT_1' R41-1 R42-2 NET 'VTT_1' R43-1 R44-2 # Ground the unused pins #49 and #50 on connector J3 NET 'GROUND' J3-49 J3-50 # # CB_Fan PCB Nets # # Drive the J4 Connector Control Signals # ---------------------------------------- # # # Original Rev. 24-Jan-2012 # Most Recent Rev. 12-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # J4 is the connector for Control Busses: 6, 7, and 8. # # Control Busses: 6, 7, 8 are ECL Control Busses. # # This section of the CB-Fan net list drives the 4 Control # Signals: CRST, TRIG, CLR, and CLK on to the J4 Control # Bus connector. # Drive CRST to 3 Control Busses on the J4 Connector NET 'CRST_6_DIST_DIR' U31-8 # CRST Distribute 6 Direct NET 'CRST_6_DIST_CMP' U31-7 # CRST Distribute 6 Complement NET 'CRST_6_CMOS_ECL' U37-18 U31-2 # CRST Dist 6 CMOS to ECL NET 'CRST_6_ECL_OUT_DIR' U37-21 J4-1 R51-2 # CRST DIR Out 6 NET 'CRST_6_ECL_OUT_CMP' U37-23 J4-2 R52-1 # CRST CMP Out 6 NET 'CRST_7_DIST_DIR' U33-8 # CRST Distribute 7 Direct NET 'CRST_7_DIST_CMP' U33-7 # CRST Distribute 7 Complement NET 'CRST_7_CMOS_ECL' U37-12 U33-2 # CRST Dist 7 CMOS to ECL NET 'CRST_7_ECL_OUT_DIR' U37-7 J4-17 R59-2 # CRST DIR Out 7 NET 'CRST_7_ECL_OUT_CMP' U37-6 J4-18 R60-1 # CRST CMP Out 7 NET 'CRST_8_DIST_DIR' U35-8 # CRST Distribute 8 Direct NET 'CRST_8_DIST_CMP' U35-7 # CRST Distribute 8 Complement NET 'CRST_8_CMOS_ECL' U38-20 U35-2 # CRST Dist 8 CMOS to ECL NET 'CRST_8_ECL_OUT_DIR' U38-27 J4-33 R67-2 # CRST DIR Out 8 NET 'CRST_8_ECL_OUT_CMP' U38-26 J4-34 R68-1 # CRST CMP Out 8 # Drive TRIG to 3 Control Busses on the J4 Connector NET 'TRIG_6_DIST_DIR' U31-6 # TRIG Distribute 6 Direct NET 'TRIG_6_DIST_CMP' U31-5 # TRIG Distribute 6 Complement NET 'TRIG_6_CMOS_ECL' U37-19 U31-3 # TRIG Dist 6 CMOS to ECL NET 'TRIG_6_ECL_OUT_DIR' U37-24 J4-3 R53-2 # TRIG DIR Out 6 NET 'TRIG_6_ECL_OUT_CMP' U37-25 J4-4 R54-1 # TRIG CMP Out 6 NET 'TRIG_7_DIST_DIR' U33-6 # TRIG Distribute 7 Direct NET 'TRIG_7_DIST_CMP' U33-5 # TRIG Distribute 7 Complement NET 'TRIG_7_CMOS_ECL' U37-11 U33-3 # TRIG Dist 7 CMOS to ECL NET 'TRIG_7_ECL_OUT_DIR' U37-10 J4-19 R61-2 # TRIG DIR Out 7 NET 'TRIG_7_ECL_OUT_CMP' U37-9 J4-20 R62-1 # TRIG CMP Out 7 NET 'TRIG_8_DIST_DIR' U35-6 # TRIG Distribute 8 Direct NET 'TRIG_8_DIST_CMP' U35-5 # TRIG Distribute 8 Complement NET 'TRIG_8_CMOS_ECL' U38-13 U35-3 # TRIG Dist 8 CMOS to ECL NET 'TRIG_8_ECL_OUT_DIR' U38-4 J4-35 R69-2 # TRIG DIR Out 8 NET 'TRIG_8_ECL_OUT_CMP' U38-5 J4-36 R70-1 # TRIG CMP Out 8 # Drive CLR to 3 Control Busses on the J4 Connector NET 'CLR_6_DIST_DIR' U32-8 # CLR Distribute 6 Direct NET 'CLR_6_DIST_CMP' U32-7 # CLR Distribute 6 Complement NET 'CLR_6_CMOS_ECL' U37-20 U32-2 # CLR Dist 6 CMOS to ECL NET 'CLR_6_ECL_OUT_DIR' U37-27 J4-5 R55-2 # CLR DIR Out 6 NET 'CLR_6_ECL_OUT_CMP' U37-26 J4-6 R56-1 # CLR CMP Out 6 NET 'CLR_7_DIST_DIR' U34-8 # CLR Distribute 7 Direct NET 'CLR_7_DIST_CMP' U34-7 # CLR Distribute 7 Complement NET 'CLR_7_CMOS_ECL' U38-18 U34-2 # CLR Dist 7 CMOS to ECL NET 'CLR_7_ECL_OUT_DIR' U38-21 J4-21 R63-2 # CLR DIR Out 7 NET 'CLR_7_ECL_OUT_CMP' U38-23 J4-22 R64-1 # CLR CMP Out 7 NET 'CLR_8_DIST_DIR' U36-8 # CLR Distribute 8 Direct NET 'CLR_8_DIST_CMP' U36-7 # CLR Distribute 8 Complement NET 'CLR_8_CMOS_ECL' U38-12 U36-2 # CLR Dist 8 CMOS to ECL NET 'CLR_8_ECL_OUT_DIR' U38-7 J4-37 R71-2 # CLR DIR Out 8 NET 'CLR_8_ECL_OUT_CMP' U38-6 J4-38 R72-1 # CLR CMP Out 8 # Drive CLK to 3 Control Busses on the J4 Connector NET 'CLK_6_DIST_DIR' U32-6 # CLK Distribute 6 Direct NET 'CLK_6_DIST_CMP' U32-5 # CLK Distribute 6 Complement NET 'CLK_6_CMOS_ECL' U37-13 U32-3 # CLK Dist 6 CMOS to ECL NET 'CLK_6_ECL_OUT_DIR' U37-4 J4-7 R57-2 # CLK DIR Out 6 NET 'CLK_6_ECL_OUT_CMP' U37-5 J4-8 R58-1 # CLK CMP Out 6 NET 'CLK_7_DIST_DIR' U34-6 # CLK Distribute 7 Direct NET 'CLK_7_DIST_CMP' U34-5 # CLK Distribute 7 Complement NET 'CLK_7_CMOS_ECL' U38-19 U34-3 # CLK Dist 7 CMOS to ECL NET 'CLK_7_ECL_OUT_DIR' U38-24 J4-23 R65-2 # CLK DIR Out 7 NET 'CLK_7_ECL_OUT_CMP' U38-25 J4-24 R66-1 # CLK CMP Out 7 NET 'CLK_8_DIST_DIR' U36-6 # CLK Distribute 8 Direct NET 'CLK_8_DIST_CMP' U36-5 # CLK Distribute 8 Complement NET 'CLK_8_CMOS_ECL' U38-11 U36-3 # CLK Dist 8 CMOS to ECL NET 'CLK_8_ECL_OUT_DIR' U38-10 J4-39 R73-2 # CLK DIR Out 8 NET 'CLK_8_ECL_OUT_CMP' U38-9 J4-40 R74-1 # CLK CMP Out 8 # Connect the ECL Pull Down Resistors to the Vtt Supply NET 'VTT_1' R51-1 R52-2 NET 'VTT_1' R53-1 R54-2 NET 'VTT_1' R55-1 R56-2 NET 'VTT_1' R57-1 R58-2 NET 'VTT_1' R59-1 R60-2 NET 'VTT_1' R61-1 R62-2 NET 'VTT_1' R63-1 R64-2 NET 'VTT_1' R65-1 R66-2 NET 'VTT_1' R67-1 R68-2 NET 'VTT_1' R69-1 R70-2 NET 'VTT_1' R71-1 R72-2 NET 'VTT_1' R73-1 R74-2 # Ground the unused pins #49 and #50 on connector J4 NET 'GROUND' J4-49 J4-50 # # CB_Fan PCB Nets # # Drive the J8 Scaler Connector Control Signals # ---------------======---------------------------- # # # Original Rev. 23-Feb-2012 # Most Recent Rev. 13-Apr-2012 # # # This file is for the 8 Control Bus version of the CB-Fan card. # # # J8 is the connector for Scaler Control Bus. # # This is an ECL Control Bus that uses Load_Next_Event # signal from J6 instead of the TRIG signal. # # This section of the CB-Fan net list drives the 4 Control # Signals: CRST, LNE, CLR, and CLK on to the J8 Scaler # Control Bus connector. # Drive CRST on the Scaler Control Bus the J8 Connector # The CRST signal can be sent to the Scaler Control Bus by installing R132 # The CRST signal can be held LOW on the Scaler Control Bus by installing R133 NET 'CRST_9_DIST_DIR' U41-8 # CRST Distribute 9 Direct NET 'CRST_9_DIST_CMP' U41-7 # CRST Distribute 9 Complement NET 'CRST_9_CMOS' R132-2 U41-2 # Output from CRST 9 LVDS Rec. NET 'CRST_9_ECL' U43-19 R132-1 R133-2 # Input to CRST 9 ECL Driver NET 'CRST_9_ECL_OUT_DIR' U43-24 J8-1 R81-2 # CRST DIR Out Scaler NET 'CRST_9_ECL_OUT_CMP' U43-25 J8-2 R82-1 # CRST CMP Out Scaler NET 'GROUND' R133-1 # Pull-Down for CRST # Drive LNE Load_Next_Event on the Scaler Control Bus the J8 Connector # # Recall that the LNE signal is also used for # the SBCs_READ_NOW control signal. NET 'LNE_RN_DIST_DIR' J6-7 U41-6 # LNE from J6 conn Direct NET 'LNE_RN_DIST_CMP' J6-8 U41-5 # LNE from J6 conn Complement NET 'LNE_READ_NOW_CMOS_ECL' U43-20 U41-3 # LNE Dist CMOS to ECL NET 'LNE_ECL_OUT_DIR' U43-27 J8-3 R83-2 # LNE DIR Out Scaler NET 'LNE_ECL_OUT_CMP' U43-26 J8-4 R84-1 # LNE CMP Out Scaler # Drive CLR on the Scaler Control Bus the J8 Connector # The CLR signal can be sent to the Scaler Control Bus by installing R134 # The CLR signal can be held LOW on the Scaler Control Bus by installing R135 NET 'CLR_9_DIST_DIR' U42-8 # CLR Distribute 9 Direct NET 'CLR_9_DIST_CMP' U42-7 # CLR Distribute 9 Complement NET 'CLR_9_CMOS' R134-2 U42-2 # Output from CLR 9 LVDS Rec. NET 'CLR_9_ECL' U43-13 R134-1 R135-2 # Input to CLR 9 ECL Driver NET 'CLR_9_ECL_OUT_DIR' U43-4 J8-5 R85-2 # CLR DIR Out Scaler NET 'CLR_9_ECL_OUT_CMP' U43-5 J8-6 R86-1 # CLR CMP Out Scaler NET 'GROUND' R135-1 # Pull-Down for CRST # Drive CLK on the Scaler Control Bus the J8 Connector NET 'CLK_9_DIST_DIR' U42-6 # CLK Distribute 9 Direct NET 'CLK_9_DIST_CMP' U42-5 # CLK Distribute 9 Complement NET 'CLK_9_CMOS_ECL' U43-12 U42-3 # CLK Dist 9 CMOS to ECL NET 'CLK_9_ECL_OUT_DIR' U43-7 J8-7 R87-2 # CLK DIR Out Scaler NET 'CLK_9_ECL_OUT_CMP' U43-6 J8-8 R88-1 # CLK CMP Out Scaler # Ground the 2 unused inputs to the ECL Driver chip U43 NET 'GROUND' U43-11 U43-18 # Connect the ECL Pull Down Resistors to the Vtt Supply NET 'VTT_1' R81-1 R82-2 NET 'VTT_1' R83-1 R84-2 NET 'VTT_1' R85-1 R86-2 NET 'VTT_1' R87-1 R88-2 # This is a Key In Net List file for # the CB-Fan 2 for the HAWC Experiment # # VME Backplane P1 Connector # --------------====---------- # # # Original Rev. 17-FEB-2012 # Most Recent Rev. 20-FEB-2012 # This file includes all the nets from the VME "P1" connector # including the "Z" and "D" columns of this connector. Only # the pins in this connector that have signals that are used # in the CB-Fan 2 design are assigned with NET statements. # CB-Fan uses only: +3.3V Power, +5.0V Power, and Ground from # the P1 connector. # The "Z" Column # -------------- NET 'GROUND' P1-Z2 # VME-64X ground pin NET 'GROUND' P1-Z4 # VME-64X ground pin NET 'GROUND' P1-Z6 # VME-64X ground pin NET 'GROUND' P1-Z8 # VME-64X ground pin NET 'GROUND' P1-Z10 # VME-64X ground pin NET 'GROUND' P1-Z12 # VME-64X ground pin NET 'GROUND' P1-Z14 # VME-64X ground pin NET 'GROUND' P1-Z16 # VME-64X ground pin NET 'GROUND' P1-Z18 # VME-64X ground pin NET 'GROUND' P1-Z20 # VME-64X ground pin NET 'GROUND' P1-Z22 # VME-64X ground pin NET 'GROUND' P1-Z24 # VME-64X ground pin NET 'GROUND' P1-Z26 # VME-64X ground pin NET 'GROUND' P1-Z28 # VME-64X ground pin NET 'GROUND' P1-Z30 # VME-64X ground pin NET 'GROUND' P1-Z32 # VME-64X ground pin # The "A" Column # -------------- NET 'GROUND' P1-A9 # VME ground pin NET 'GROUND' P1-A11 # VME ground pin NET 'GROUND' P1-A15 # VME ground pin NET 'GROUND' P1-A17 # VME ground pin NET 'GROUND' P1-A19 # VME ground pin NET 'VME_IACK_LOOP' P1-A21 # VME Interrupt_Acknowledge_In_* 'VME_IACKIN_B' NET 'VME_IACK_LOOP' P1-A22 # VME Interrupt_Acknowledge_Out_* 'VME_IACKOUT_B' NET 'VME_5V' P1-A32 # VME +5 Volt Bus Power # The "B" Column # -------------- # Note that the 3 of the 4 Bus Grant In-Out pin pairs are just tied # together. The Bus_GRANT_1 In-Out pair is brought onto the CB-Fan -2 # card where it is used to pass the start up signal from the power up # supervisor on one CB-Fan card to the CB-Fan card in the next hight slot. NET 'BUS_GRANT_0' P1-B4 P1-B5 # P1-B4 is VME Bus_Grant_0_In_* signal # P1-B5 is VME Bus_Grant_0_Out_* signal NET 'BUS_GRANT_1' P1-B6 P1-B7 # P1-B6 is VME Bus_Grant_1_In_* signal # P1-B7 is VME Bus_Grant_1_Out_* signal NET 'BUS_GRANT_2' P1-B8 P1-B9 # P1-B8 is VME Bus_Grant_2_In_* signal # P1-B9 is VME Bus_Grant_2_Out_* signal NET 'BUS_GRANT_3' P1-B10 P1-B11 # P1-B10 is VME Bus_Grant_3_In_* signal # P1-B11 is VME Bus_Grant_3_Out_* signal NET 'GROUND' P1-B20 # VME ground pin NET 'GROUND' P1-B23 # VME ground pin NET 'VME_5V' P1-B32 # VME +5 Volt Bus Power # The "C" Column # -------------- NET 'GROUND' P1-C9 # VME ground pin NET 'VME_5V' P1-C32 # VME +5 Volt Bus Power # The "D" Column # -------------- NET 'GROUND' P1-D2 # VME-64X ground pin Extended Pin NET 'VME_3V3' P1-D12 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D14 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D16 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D18 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D20 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D22 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D24 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D26 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D28 # VME-64X +3.3 Volt Bus Power NET 'VME_3V3' P1-D30 # VME-64X +3.3 Volt Bus Power NET 'GROUND' P1-D31 # VME-64X ground pin Extended Pin # # This is a Key In Net List file for # the CB-Fan for the HAWC Experiment # # Backplane P2 Connector # ------------====------------ # # # Original Rev. 17-FEB-2012 # Most Recent Rev. 17-FEB-2012 # This file includes all the nets from the "P2" connector # including the "Z" and "D" columns of this connector. # Only the pins in this connector that have signals that are # used in the CB-Fan card are assigned with NET statements. # For the CB-Fan only the Power and Ground pins are used in P2. # The "Z" Column # -------------- NET 'GROUND' P2-Z2 P2-Z4 P2-Z6 P2-Z8 P2-Z10 # VME-64X ground pin NET 'GROUND' P2-Z12 P2-Z14 P2-Z16 P2-Z18 P2-Z20 # VME-64X ground pin NET 'GROUND' P2-Z22 P2-Z24 P2-Z26 P2-Z28 P2-Z30 # VME-64X ground pin NET 'GROUND' P2-Z32 # VME-64X ground pin # The CB-Fan makes no P2 connection to "Z" column odd number pins. # The "A" Column # -------------- # The CB-Fan makes no P2 connection to any "A" column pins. # The "B" Column # -------------- NET 'GROUND' P2-B2 P2-B12 P2-B22 P2-B31 # VME ground pin NET 'VME_5V' P2-B1 P2-B13 P2-B32 # VME +5 Volt Bus Power # The CB-Fan makes no P2 connection to "B" column pins 3:11, 14:21, 23:30. # The "C" Column # -------------- # The CB-Fan makes no P2 connection to any "A" column pins. # The "D" Column # -------------- NET 'GROUND' P2-D31 # VME-64X ground pin Extended Pin # The CB-Fan makes no P2 connection to "D" column pins 1:30, 32. # # SBC Read-Now and Busy Nets # # CB_Fan PCB Nets # --------------------- # # # Original Rev. 3-Mar-2012 # Most Recent Rev. 19-Apr-2012 # # # This file is for the 8 Control Bus version of the CB-Fan card. # # This file defines the nets associated with the # # SBC Read-Now and Busy # # # Each CB-Fan card can service up to 8 SBC providing each # SBC with its own copy of a common Read-Now signal and # receiving from each SBC a separate Busy signal. # # All signals to and from the SBCs are carried on connector J11. # These are all single ended signal with 3.3V logic levels. # The 8 individually driven Read-Now signals are back terminated. # # The SBC Read_Now signal comes to the CB-Fan card from the # Control H-Clk card. There are 2 possible sources of the # SBC Read_Now signal: # # 1. In systems using 4 CB_Fan cards, each CB_Fan card can # receive only 4 control signals from the Control H-Clk # card. The pin pair on J6 that normally receives the # Load_Next_Event signal (which is only needed on 1 of # the 4 CB_Fan cards) will be used to carry the Read_Now # signal to the other 3 CB_Fan cards. This allows the # system to have up to 24 SBCs that are managed by the # Read_Now signal. Recall that the FPGA on the Control # H-Clk can send a different signal to different CB_Fan # cards on their J6 "Load_Next_Event" pin pair. # # 2. In systems using only 1, 2, or 4 CB_Fan cards there is # room on their J6 connector to send a separate Read_Now # signal from the Control H-Clk card to the CB_Fan card(s). # This is the 5th pin pair on J6. The signal from this # pin pair is received by LVDS receiver U55. # # Selecting either the Load_Next_Event pin pair or the 5th pin # pair on J6 as the source of the Read_Now signal is made by # installing either jumper R125 or R126. # # - Install jumper R125 to select the 5th pin pair on J6 as # the source of Read_Now. # # - Install R126 to select the Load_Next_Event pin pair on # J6 as the source of the Read_Now signal. # # # The 8 individual SBC Busy signals are returned to the # Control H_Clk card on the same lines as are used for the # Control Bus Almost_Full_2 signals. Thus a given CB-Fan # card can either: return 8 SBC Busy signals or return # 8 Control Bus Almost_Full_2 signals to the Control H-Clk # card. # # All J11 even pins are Ground. # J11 odd pins 1, 5, 9,... are Read_Now_1, Read_Now_2, Read_Now_3, ... # J11 odd pins 3, 7, 11,... are SBC_1_Busy, SBC_2_Busy, SBC_3_Busy, ... # # Ground the Even pins on J11 NET 'GROUND' J11-2 J11-4 J11-6 J11-8 J11-10 NET 'GROUND' J11-12 J11-14 J11-16 J11-18 J11-20 NET 'GROUND' J11-22 J11-24 J11-26 J11-28 J11-30 NET 'GROUND' J11-32 J11-34 # Wire the 5th pin pair on J6 to an LVDS input on U55 NET 'RN_SPC_J6_5TH_DIR' J6-9 U55-6 # Special Read_Now Input Dir NET 'RN_SPC_J6_5TH_CMP' J6-10 U55-5 # Special Read_Now Input Cmp NET 'REC_J6_5TH_TO_PDRV' U55-3 U51-9 # Received RN from J6 5th pair # to the Pre-Driver. # Select Read_Now as coming from J6 5th pin pair or coming # from the J6 pin pair that normally carries Load_Next_Event NET 'SEL_RN_FROM_J6_5TH' U51-11 R125-2 # Read_Now from J6 5th pin pair # received and to the select jumper NET 'LNE_READ_NOW_CMOS_ECL' U51-8 # LNE Input to the Read Now Pre-Driver NET 'SEL_RN_FROM_RNE' U51-12 R126-2 # Read_Now from the LNE J6 signal pair # received and to the select jumper NET 'RN_DRVR_INPUT' R125-1 R126-1 # Select Jumper to Read Now Driver NET 'GROUND' U51-2 U51-3 U51-4 # Unused Pre-Drive Inputs NET 'GROUND' U51-5 U51-6 U51-7 # Unused Pre-Drive Inputs # U52 Input to the SBCs Read Now Drivers NET 'RN_DRVR_INPUT' U52-2 U52-3 U52-4 U52-5 # SBC RN Driver In NET 'RN_DRVR_INPUT' U52-6 U52-7 U52-8 U52-9 # SBC RN Driver In # U52 SBCs_READ_NOW driver output through series terminator to J11 -> SBCs NET 'SBC_1_READ_NOW' U52-18 R91-1 # Drive SBC 1 Read Now NET 'TERMD_SBC_1_RN' R91-2 J11-1 # Series Terminated SBC 1 Read Now NET 'SBC_2_READ_NOW' U52-17 R92-1 # Drive SBC 2 Read Now NET 'TERMD_SBC_2_RN' R92-2 J11-5 # Series Terminated SBC 2 Read Now NET 'SBC_3_READ_NOW' U52-16 R93-1 # Drive SBC 3 Read Now NET 'TERMD_SBC_3_RN' R93-2 J11-9 # Series Terminated SBC 3 Read Now NET 'SBC_4_READ_NOW' U52-15 R94-1 # Drive SBC 4 Read Now NET 'TERMD_SBC_4_RN' R94-2 J11-13 # Series Terminated SBC 4 Read Now NET 'SBC_5_READ_NOW' U52-14 R95-1 # Drive SBC 5 Read Now NET 'TERMD_SBC_5_RN' R95-2 J11-17 # Series Terminated SBC 5 Read Now NET 'SBC_6_READ_NOW' U52-13 R96-1 # Drive SBC 6 Read Now NET 'TERMD_SBC_6_RN' R96-2 J11-21 # Series Terminated SBC 6 Read Now NET 'SBC_7_READ_NOW' U52-12 R97-1 # Drive SBC 7 Read Now NET 'TERMD_SBC_7_RN' R97-2 J11-25 # Series Terminated SBC 7 Read Now NET 'SBC_8_READ_NOW' U52-11 R98-1 # Drive SBC 8 Read Now NET 'TERMD_SBC_8_RN' R98-2 J11-29 # Series Terminated SBC 8 Read Now # U51 and U52 Enable the 74LVC541A octal buffers # The SBCs Read Now pre-driver and driver NET 'GROUND' U51-1 U51-19 # Pull-Down to enable 74LVC541 pre-driver NET 'GROUND' U52-1 U52-19 # Pull-Down to enable 74LVC541 driver # SBC Busy signals from J11 to the 65LVDS391 LVDS driver U53 NET 'SBC_1_BUSY' J11-3 U53-2 # SBC_1_Busy from the SBC cable NET 'SBC_2_BUSY' J11-7 U53-3 # SBC_2_Busy from the SBC cable NET 'SBC_3_BUSY' J11-11 U53-6 # SBC_3_Busy from the SBC cable NET 'SBC_4_BUSY' J11-15 U53-7 # SBC_4_Busy from the SBC cable NET 'SBC_5_BUSY' J11-19 U54-2 # SBC_5_Busy from the SBC cable NET 'SBC_6_BUSY' J11-23 U54-3 # SBC_6_Busy from the SBC cable NET 'SBC_7_BUSY' J11-27 U54-6 # SBC_7_Busy from the SBC cable NET 'SBC_8_BUSY' J11-31 U54-7 # SBC_8_Busy from the SBC cable # We also have pull-down resistors on these 8 SBC_n_BUSY # input signals which are needed on these CMOS inputs when # no real signal is connected to them. NET 'SBC_1_BUSY' R161-1 # SBC_1_BUSY Input Pull-Down NET 'SBC_2_BUSY' R162-1 # SBC_2_BUSY Input Pull-Down NET 'SBC_3_BUSY' R163-1 # SBC_3_BUSY Input Pull-Down NET 'SBC_4_BUSY' R164-1 # SBC_4_BUSY Input Pull-Down NET 'SBC_5_BUSY' R165-1 # SBC_5_BUSY Input Pull-Down NET 'SBC_6_BUSY' R166-1 # SBC_6_BUSY Input Pull-Down NET 'SBC_7_BUSY' R167-1 # SBC_7_BUSY Input Pull-Down NET 'SBC_8_BUSY' R168-1 # SBC_8_BUSY Input Pull-Down NET 'GROUND' R161-2 R162-2 R163-2 R164-2 # Ground the Pull-Downs NET 'GROUND' R165-2 R166-2 R167-2 R168-2 # Ground the Pull-Downs # Now connect the SBC_n_Busy drivers to connector J5. # Recall that these signals share pins with the Almost_Full_2 signals. NET 'AMF_2_1_SBC_1_BZ_DIR' U53-16 # Almost Full 2 CB 1 or NET 'AMF_2_1_SBC_1_BZ_CMP' U53-15 # SBC 1 Busy NET 'AMF_2_2_SBC_2_BZ_DIR' U53-14 # Almost Full 2 CB 2 or NET 'AMF_2_2_SBC_2_BZ_CMP' U53-13 # SBC 2 Busy NET 'AMF_2_3_SBC_3_BZ_DIR' U53-12 # Almost Full 2 CB 3 or NET 'AMF_2_3_SBC_3_BZ_CMP' U53-11 # SBC 3 Busy NET 'AMF_2_4_SBC_4_BZ_DIR' U53-10 # Almost Full 2 CB 4 or NET 'AMF_2_4_SBC_4_BZ_CMP' U53-9 # SBC 4 Busy NET 'AMF_2_5_SBC_5_BZ_DIR' U54-16 # Almost Full 2 CB 5 or NET 'AMF_2_5_SBC_5_BZ_CMP' U54-15 # SBC 5 Busy NET 'AMF_2_6_SBC_6_BZ_DIR' U54-14 # Almost Full 2 CB 6 or NET 'AMF_2_6_SBC_6_BZ_CMP' U54-13 # SBC 6 Busy NET 'AMF_2_7_SBC_7_BZ_DIR' U54-12 # Almost Full 2 CB 7 or NET 'AMF_2_7_SBC_7_BZ_CMP' U54-11 # SBC 7 Busy NET 'AMF_2_8_SBC_8_BZ_DIR' U54-10 # Almost Full 2 CB 8 or NET 'AMF_2_8_SBC_8_BZ_CMP' U54-9 # SBC 8 Busy # Jumpers to enable the outputs of the 65LVDS391 # SBC_n_Busy LVDS driver chips. NET 'SBC_BUSY_DRV_ENB_A' U53-1 U53-8 R121-1 R122-1 # ENA 65LVDS391 NET 'SBC_BUSY_DRV_ENB_B' U54-1 U54-8 R123-1 R124-1 # ENB 65LVDS391 NET 'VDD' R122-2 R124-2 # Pull-Up for EN NET 'GROUND' R121-2 R123-2 # Pull-Down for EN # There is a unused section in the U55 LVDS to CMOS receiver. # This unused section is connected to vias V5, V6, V7 so that # it is easy to use it if it is ever needed. NET 'NOT_USED_U55_DIR' U55-8 V6-1 # unused LVDS Rec DIR Input NET 'NOT_USED_U55_CMP' U55-7 V5-1 # unused LVDS Rec CMP Input NET 'NOT_USED_U55_OUT' U55-2 V7-1 # unused LVDS Rec Output # # CB_Fan PCB Nets # # General Purpose Input 4 Signals Nets # ---------------------------------------- # # # Original Rev. 9-Mar-2012 # Most Recent Rev. 14-Apr-2012 # # # # This file holds the netss that make the # 4 General Purpose Input Signals. # # Start the section that has the nets that allow # the CB-Fan to receive 4 general purpose input lines, # as either LVDS, Diff_ECL, or single ended 3.3V logic, # and return these signals to the Control H-Clk card # on the same lines that are used for Scaler System # Almost_Full_1_2 and LNE_Event. # # Conn J13 is used to receive these 4 General Purpose # input lines as single ended 3.3V logic. # # Conn J12 is used to receive these 4 general Purpose # input lines as LVDS or Diff_ECL. # # Conn J7 is for the cable that returns 4 signals, # either Scaler System Almost_Full_1_2 and LNE_Enable # or these 4 general purpose input signals to the # Control H-Clk card. # Start by Grounding the even number pins on J13. NET 'GROUND' J13-2 J13-4 J13-6 J13-8 J13-10 # Connect the odd number pins on J13, i.e. the single # ended 3.3V logic signals, to the input of the LVDS Driver. NET 'GP_IN_1_TO_DRIVER_IN' J13-1 U56-7 # General Purpose 3.3V In 1 NET 'GP_IN_2_TO_DRIVER_IN' J13-3 U56-6 # General Purpose 3.3V In 2 NET 'GP_IN_3_TO_DRIVER_IN' J13-5 U56-3 # General Purpose 3.3V In 3 NET 'GP_IN_4_TO_DRIVER_IN' J13-7 U56-2 # General Purpose 3.3V In 4 # We also have pull-down resistors on these 4 General Purpose # Input signals which are needed on these CMOS inputs when # no real signal is connected to them. NET 'GP_IN_1_TO_DRIVER_IN' R171-2 # General Purpose Input #1 Pull-Down NET 'GP_IN_2_TO_DRIVER_IN' R172-2 # General Purpose Input #2 Pull-Down NET 'GP_IN_3_TO_DRIVER_IN' R173-2 # General Purpose Input #3 Pull-Down NET 'GP_IN_4_TO_DRIVER_IN' R174-2 # General Purpose Input #4 Pull-Down NET 'GROUND' R171-1 R172-1 R173-1 R174-1 # Ground the Pull-Downs # Connect the outputs from the 4 General Purpose Signal # LVDS Drivers to the pins are the J7 connector that run # these 4 General Purpose Input signals back to the Control # H-Clk card. At the same time pick up the pins on J12 # that allow you to receive the 4 General Purpose Input # signals at ECL or LVDS levels. Recall the the first # two pin pairs on J7 (going back to the Control H-Clk card) # may also be used to carry the Almost_Full_1_2 from the # Scaler System Control Bus. NET 'FULL_1_SCLR_OR_GPIN_1_DIR' U56-10 J12-1 # GP Signal #1 DIR back to the NET 'FULL_1_SCLR_OR_GPIN_1_CMP' U56-9 J12-2 # GP Signal #1 CMP Control H-Clk NET 'FULL_2_SCLR_OR_GPIN_2_DIR' U56-12 J12-3 # GP Signal #2 DIR back to the NET 'FULL_2_SCLR_OR_GPIN_2_CMP' U56-11 J12-4 # GP Signal #2 CMP Control H-Clk NET 'GPIN_3_DIR' U56-14 J12-5 J7-5 # GP Signal #3 DIR back to Control H-Clk NET 'GPIN_3_CMP' U56-13 J12-6 J7-6 # GP Signal #3 CMP NET 'GPIN_4_DIR' U56-16 J12-7 J7-7 # GP Signal #4 DIR back to Control H-Clk NET 'GPIN_4_CMP' U56-15 J12-8 J7-8 # GP Signal #4 CMP # Jumpers to enable the outputs of the 65LVDS391 # LVDS driver chip for the 4 General Purpose Input Signals. # Either or both pairs of LVDS outputs from the 65LVDS391 # may be separately enabled. NET 'GPIN_4_DRV_12_ENB' U56-1 R138-1 R139-2 # ENAB 65LVDS391 sections 1,2 NET 'GPIN_4_DRV_34_ENB' U56-8 R136-1 R137-2 # ENAB 65LVDS391 sections 3,4 NET 'VDD' R137-1 R139-1 # Pull-Up for EN NET 'GROUND' R136-2 R138-2 # Pull-Down for EN # # CB_Fan PCB Nets # # Front Panel Nets # --------------------- # # # Original Rev. 21-Mar-2012 # Most Recent Rev. 22-Apr-2012 # # # # This file holds the nets for the Front Panel Display LEDs. # # The 4 front panel LEDs are: # # - LED to show that Vdd +3.3V is present green upper left # - LED to show that Vcc +5.0V is present green upper right # - LED to show that the 40 MHz Clock is present red lower left # - LED to show when Triggers are being issued red lower right # # This file also holds the nets for the U57 stretcher # circuit for the Clock and Trigger LEDs. # # This file also has the nets for weakly grounding the # front panel of the card. # # Start by connecting the Vcc and Vdd Power LEDs in component LED2 NET 'GROUND' LED2-1 LED2-3 # Ground the cathodes of power LEDs NET 'VDD' R142-2 # Vdd for Vdd Power LED NET 'P_LED_DD' R142-1 LED2-2 # Anode of the Vdd Power LED NET 'VCC' R141-2 # Vcc for Vcc Power LED NET 'P_LED_CC' R141-1 LED2-4 # Anode of the Vcc Power LED # Clock Running LED and Stretcher NET 'CLK_8_CMOS_ECL' R143-2 # Source of 40 Mhz Clk for LED Monitor NET 'ISO_CLK_TO_B' R143-1 U57-2 # Isolated Clk to start the stretcher NET 'GROUND' U57-1 # Unused Clk LED Stretcher inputs NET 'VCC' U57-3 # Unused Clk LED Stretcher inputs NET 'GROUND' C141-2 U57-14 # Clk LED Stretcher timing NET 'RC_EXT_CLK' C141-1 R145-2 U57-15 # Clk LED Stretcher timing NET 'VCC' R145-1 # Clk LED Stretcher timing NET 'CLK_STR_Q_B' U57-4 R147-2 # Clk LED Stretcher output NET 'CLK_LED_CTH' LED1-1 R147-1 # Clk LED NET 'VCC' LED1-2 # Trigger Issued LED and Stretcher NET 'TRIG_8_CMOS_ECL' R144-2 # Source of Trig for LED Monitor NET 'ISO_TRG_TO_B' R144-1 U57-10 # Isolated TRG to start the stretcher NET 'GROUND' U57-9 # Unused TRG LED Stretcher inputs NET 'VCC' U57-11 # Unused TRG LED Stretcher inputs NET 'GROUND' C142-1 U57-6 # TRG LED Stretcher timing NET 'RC_EXT_TRG' C142-2 R146-1 U57-7 # TRG LED Stretcher timing NET 'VCC' R146-2 # TRG LED Stretcher timing NET 'TRG_STR_Q_B' U57-12 R148-2 # TRG LED Stretcher output NET 'TRG_LED_CTH' LED1-3 R148-1 # TRG LED NET 'VCC' LED1-4 # LED Stretcher Power, Ground, and ByPass Caps NET 'VCC' U57-16 C143-2 C144-2 NET 'GROUND' U57-8 C143-1 C144-1 # Weakly ground the front panel of the card. NET 'GROUND' R151-2 R152-2 R153-2 NET 'GA_GND_THREE' R153-1 GA3-1 # Upper mounting screw weak ground NET 'GA_GND_TWO' R152-1 GA2-1 # Middle mounting screw weak ground NET 'GA_GND_ONE' R151-1 GA1-1 # Lower mounting screw weak ground # CB_Fan PCB Nets # # Power and ByPass Capacitors for the LVDS Fanout Chips # ------------------------------------------------------ # # # Original Rev. 30-Jan-2012 # Most Recent Rev. 6-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # This section of the CB-Fan net list contains all of the # power and ground pin connections to the DS90LV110T LVDS # fanout chips and the Vdd bypass capacitors for these chips # and their output enable control pin connections. # # This net list also includes the ENABLE signal for the # DS90LV110T chips that comes through R130 from Vdd. # # The DS90LV110T fanout chips are: U1 through U4. # # DS90LV110T Ground Pins NET 'GROUND' U1-6 U1-9 U1-21 NET 'GROUND' U2-6 U2-9 U2-21 NET 'GROUND' U3-6 U3-9 U3-21 NET 'GROUND' U4-6 U4-9 U4-21 # DS90LV110T Vdd Pins NET 'VDD' U1-10 U1-22 NET 'VDD' U2-10 U2-22 NET 'VDD' U3-10 U3-22 NET 'VDD' U4-10 U4-22 # DS90LV110T Output Enable Pins NET 'ENB_U1_U4_OUT' U1-5 U2-5 U3-5 U4-5 # Pull-Up to Vdd to NET 'ENB_U1_U4_OUT' R131-1 # Enable the 90LV110 NET 'VDD' R131-2 # U1, U2, U3, U4 Outputs # DS90LV110T Ceramic ByPass Capacitors NET 'VDD' C11-2 C12-1 C13-2 C14-1 NET 'GROUND' C11-1 C12-2 C13-1 C14-2 NET 'VDD' C15-2 C16-1 C17-2 C18-1 NET 'GROUND' C15-1 C16-2 C17-1 C18-2 NET 'VDD' C19-2 NET 'GROUND' C19-1 # # CB_Fan PCB Nets # # Power and ByPass Capacitors for the Control Bus ECL Driver Chips # ------------------------------------------------------------------ # # # Original Rev. 30-Jan-2012 # Most Recent Rev. 13-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # This section of the CB-Fan net list contains all of the # power and ground pin connections to the 100324 ECL Driver # chips for the Control Busses and the Vee bypass capacitors # for these chips and their output enable control pin connections. # The 100324 ECL Driver chips for the Control Busses are: # U17, U18, U27, U28, U37, U38 # 100324 Control Bus Driver Ground Pins NET 'GROUND' U27-1 U27-2 U27-3 U27-28 NET 'GROUND' U28-1 U28-2 U28-3 U28-28 NET 'GROUND' U37-1 U37-2 U37-3 U37-28 NET 'GROUND' U38-1 U38-2 U38-3 U38-28 NET 'GROUND' U43-1 U43-2 U43-3 U43-28 # 100324 Control Bus Driver Vee Power Pins NET 'VEE_1' U27-8 U27-14 U27-15 U27-22 NET 'VEE_1' U28-8 U28-14 U28-15 U28-22 NET 'VEE_1' U37-8 U37-14 U37-15 U37-22 NET 'VEE_1' U38-8 U38-14 U38-15 U38-22 NET 'VEE_1' U43-8 U43-14 U43-15 U43-22 # 100324 Control Bus Driver Vcc Power Pins NET 'VCC' U27-17 NET 'VCC' U28-17 NET 'VCC' U37-17 NET 'VCC' U38-17 NET 'VCC' U43-17 # 100324 Control Bus Driver Output Enable Pins NET 'VCC' U27-16 NET 'VCC' U28-16 NET 'VCC' U37-16 NET 'VCC' U38-16 NET 'VCC' U43-16 # Vcc Ceramic ByPass Capacitors on the 100324s NET 'VCC' C29-2 C30-1 C31-2 C32-1 NET 'GROUND' C29-1 C30-2 C31-1 C32-2 NET 'VCC' C59-2 C60-1 C61-2 C62-1 NET 'GROUND' C59-1 C60-2 C61-1 C62-2 NET 'VCC' C85-2 C86-1 NET 'GROUND' C85-1 C86-2 # Vee Ceramic ByPass Capacitors on the 100324s NET 'VEE_1' C33-2 C34-2 C35-2 C36-2 NET 'GROUND' C33-1 C34-1 C35-1 C36-1 NET 'VEE_1' C63-2 C64-2 C65-2 C66-2 NET 'GROUND' C63-1 C64-1 C65-1 C66-1 NET 'VEE_1' C87-2 C88-2 NET 'GROUND' C87-1 C88-1 # Vtt Ceramic ByPass Capacitors on Pull-Downs R21 : R44 NET 'VTT_1' C37-2 C38-1 C39-2 C40-1 NET 'GROUND' C37-1 C38-2 C39-1 C40-2 NET 'VTT_1' C41-2 C42-1 NET 'GROUND' C41-1 C42-2 # Vtt Ceramic ByPass Capacitors on Pull-Downs R51 : R74 NET 'VTT_1' C67-2 C68-1 C69-2 C70-1 NET 'GROUND' C67-1 C68-2 C69-1 C70-2 NET 'VTT_1' C71-2 C72-1 NET 'GROUND' C71-1 C72-2 # Vtt Ceramic ByPass Capacitors on Pull-Downs R81 : R88 NET 'VTT_1' C89-1 C90-1 C91-2 C92-2 NET 'GROUND' C89-2 C90-2 C91-1 C92-1 # # CB_Fan PCB Nets # # Power and ByPass Capacitors for the Control Bus LVDS Receiver Chips # --------------------------------------------------------------------- # # # Original Rev. 30-Jan-2012 # Most Recent Rev. 13-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # This section of the CB-Fan net list contains all of the # power and ground pin connections to the 65LVDT34D LVDS Receiver # chips for the Control Busses and the Vdd bypass capacitors # for these chips. # The 65LVDT34D LVDS Receiver chips for the Control Busses are: # U21, U22, U23, U24, U25, U26 # U31, U32, U33, U34, U35, U36 # U41, U42 # # 65LVDT34D Control Bus LVDS Receiver Ground Pins NET 'GROUND' U21-4 U22-4 U23-4 U24-4 U25-4 U26-4 NET 'GROUND' U31-4 U32-4 U33-4 U34-4 U35-4 U36-4 NET 'GROUND' U41-4 U42-4 # 65LVDT34D Control Bus LVDS Receiver Vdd Pins NET 'VDD' U21-1 U22-1 U23-1 U24-1 U25-1 U26-1 NET 'VDD' U31-1 U32-1 U33-1 U34-1 U35-1 U36-1 NET 'VDD' U41-1 U42-1 # 65LVDT34D Ceramic ByPass Capacitors on Vdd NET 'VDD' C21-2 C22-1 C23-1 C24-1 NET 'GROUND' C21-1 C22-2 C23-2 C24-2 NET 'VDD' C25-1 C26-1 C27-1 C28-1 NET 'GROUND' C25-2 C26-2 C27-2 C28-2 NET 'VDD' C51-2 C52-1 C53-1 C54-1 NET 'GROUND' C51-1 C52-2 C53-2 C54-2 NET 'VDD' C55-1 C56-1 C57-1 C58-1 NET 'GROUND' C55-2 C56-2 C57-2 C58-2 NET 'VDD' C81-1 C82-1 C83-1 C84-2 NET 'GROUND' C81-2 C82-2 C83-2 C84-1 # # CB_Fan PCB Nets # # Power and ByPass Capacitors for the Generic 16 Bit Converter # ---------------------------------------========================-- # # # # Original Rev. 8-Dec-2010 # Most Recent Rev. 20-Apr-2012 # # This file is for the 8 Control Bus version of the CB-Fan card. # This section of the CB-Fan net list contains all of the # power and ground pin connections to the Generic 16 Bit Converter. # Power and Ground Connections of the ICs in this Section: # ECL<-->TTL 100398 Vcc, Gnd, Vee connections: # 100398 Vcc +5V power connections NET 'VCC' U201-14 U201-17 NET 'VCC' U202-14 U202-17 NET 'VCC' U203-14 U203-17 NET 'VCC' U204-14 U204-17 # 100398 Ground connections NET 'GROUND' U201-1 U201-2 U201-8 U201-11 U201-15 NET 'GROUND' U201-16 U201-20 U201-22 U201-28 NET 'GROUND' U202-1 U202-2 U202-8 U202-11 U202-15 NET 'GROUND' U202-16 U202-20 U202-22 U202-28 NET 'GROUND' U203-1 U203-2 U203-8 U203-11 U203-15 NET 'GROUND' U203-16 U203-20 U203-22 U203-28 NET 'GROUND' U204-1 U204-2 U204-8 U204-11 U204-15 NET 'GROUND' U204-16 U204-20 U204-22 U204-28 # 100398 Vee -5V power connections NET 'VEE_2' U201-3 U201-27 NET 'VEE_2' U202-3 U202-27 NET 'VEE_2' U203-3 U203-27 NET 'VEE_2' U204-3 U204-27 # LVDS<-->3.3V_CMOS DS91M040 Vdd and Gnd connections: # DS91M040 Vdd +3.3V power connections NET 'VDD' U205-11 U205-12 U205-29 U205-30 NET 'VDD' U206-11 U206-12 U206-29 U206-30 NET 'VDD' U207-11 U207-12 U207-29 U207-30 NET 'VDD' U208-11 U208-12 U208-29 U208-30 # DS91M040 Ground connections NET 'GROUND' U205-31 NET 'GROUND' U206-31 NET 'GROUND' U207-31 NET 'GROUND' U208-31 NET 'GROUND' U205-33 U205-34 U205-35 U205-36 NET 'GROUND' U206-33 U206-34 U206-35 U206-36 NET 'GROUND' U207-33 U207-34 U207-35 U207-36 NET 'GROUND' U208-33 U208-34 U208-35 U208-36 # Ceramic ByPass Capacitors for the Generic 16 Bit Converter # Vdd bypass capacitors for the DS91M040s NET 'VDD' C201-1 C202-1 C203-1 NET 'VDD' C204-1 C205-1 C206-1 NET 'GROUND' C201-2 C202-2 C203-2 NET 'GROUND' C204-2 C205-2 C206-2 # Vcc bypass capacitors for the 100398s NET 'VCC' C211-1 C212-2 C213-1 C214-2 NET 'VCC' C215-1 C216-2 C217-1 C218-2 NET 'GROUND' C211-2 C212-1 C213-2 C214-1 NET 'GROUND' C215-2 C216-1 C217-2 C218-1 # Vee bypass capacitors for the 100398s NET 'VEE_2' C221-1 C222-1 C223-1 C224-1 NET 'VEE_2' C225-1 C226-1 C227-1 C228-1 NET 'GROUND' C221-2 C222-2 C223-2 C224-2 NET 'GROUND' C225-2 C226-2 C227-2 C228-2 # Vtt bypass capacitors for the ECL Pull-Down Resistors NET 'VTT_2' C231-2 C232-2 C233-2 C234-2 C235-2 NET 'GROUND' C231-1 C232-1 C233-1 C234-1 C235-1 # # CB_Fan PCB Nets # # Power Entry Nets # -------------------- # # # # Original Rev. 23-Feb-2012 # Most Recent Rev. 29-Apr-2012 # # # # This file is for the 8 Control Bus version of the CB-Fan card. # # # This section of the CB-Fan net list contains all of the # Power Entry Nets, i.e. get the Vcc and Vdd power from the # VME connectors, fuse it, and do the bulk Tantalum capacitor # and Aluminum electrolytic capacitor filtering. # # Vcc is +5.0 Volts Vdd is +3.3 Volts # # This file also holds the net information for all the # supplemental Tantalum ByPass capacitors for: Vdd, Vcc, # Vee_1, Vee_2, Vtt_1, and Vtt_2. These supplemental # Tantalum capacitors start in the Ref Desig range C151. # Vdd +3.3V Power Entry NET 'VME_3V3' F301-2 # VME 3.3 Volt power to the fuse NET 'VDD' F301-1 D301-1 # Fuse "output" and Transit Suppressor NET 'VDD' C301-1 C302-1 # Aluminum and Tantalum Capacitors NET 'GROUND' D301-2 # Ground for Transit Voltage Suppressor NET 'GROUND' C301-2 C302-2 # Ground for Alum and Tant Filter Caps # Vcc +5.0V Power Entry NET 'VME_5V' F302-2 # VME 5.0 Volt power to the fuse NET 'VCC' F302-1 D302-1 # Fuse "output" and Transit Suppressor NET 'VCC' C303-1 C305-1 # Aluminum and Tantalum Capacitors NET 'VCC' C304-1 C306-1 # Aluminum and Tantalum Capacitors NET 'GROUND' D302-2 # Ground for Transit Voltage Suppressor NET 'GROUND' C303-2 C305-2 # Ground for Alum and Tant Filter Caps NET 'GROUND' C304-2 C306-2 # Ground for Alum and Tant Filter Caps # Supplemental Vdd Tantalum Capacitors NET 'VDD' C151-1 C152-1 C153-1 # Supplemental Vdd Tantalum Caps NET 'GROUND' C151-2 C152-2 C153-2 # Ground Tant Bypass Caps # Supplemental Vcc Tantalum Capacitors NET 'VCC' C154-1 C155-1 C156-1 # Supplemental Vcc Tantalum Caps NET 'GROUND' C154-2 C155-2 C156-2 # Ground Tant Bypass Caps # Supplemental Vee_1 Tantalum Capacitors NET 'VEE_1' C157-2 # Supplemental Vee_1 Tantalum Caps NET 'GROUND' C157-1 # Ground Tant Bypass Caps # Supplemental Vee_2 Tantalum Capacitors NET 'VEE_2' C158-2 # Supplemental Vee_2 Tantalum Caps NET 'GROUND' C158-1 # Ground Tant Bypass Caps # Supplemental Vtt_1 Tantalum Capacitors NET 'VTT_1' C159-2 # Supplemental Vtt_1 Tantalum Caps NET 'GROUND' C159-1 # Ground Tant Bypass Caps # Supplemental Vtt_2 Tantalum Capacitors NET 'VTT_2' C160-2 # Supplemental Vtt_2 Tantalum Caps NET 'GROUND' C160-1 # Ground Tant Bypass Caps # There are 4 "via component" ground points on the card # that may be used for ground loops during testing and such. # These are components V8 : V11. Ground them. NET 'GROUND' V8-1 V9-1 V10-1 V11-1 # Ground the ground test points # There are 4 "via component" ground points on the card # that may be used for grounding emergency features that # may need to be added to the CB-Fan card. # These are components V12 : V15. Ground them. NET 'GROUND' V12-1 V13-1 V14-1 V15-1 # Ground # # CB_Fan PCB Nets # # Power Converter Nets # ------------------------ # # # # Original Rev. 23-Feb-2012 # Most Recent Rev. 18-Apr-2012 # # # # This file is for the 8 Control Bus version of the CB-Fan card. # # # This section of the CB-Fan net list contains all of the # Power Converter Nets for the 4 Power Converters, i.e. the Vcc # input power, the -2V or -5V output power, the voltage set # resistor, and the Tantalum and ceramic filter capacitors. # # Vcc is +5.0 Volts Vtt is -2.0 Volts Vee is -4.5 Volts NET 'VCC' L1-2 L3-2 # +5V VCC input power to filter NET 'VCC' L5-2 L7-2 # chokes for converters # K1, K2, K3, K4 # Vcc +5V Input Power to Converter K1 NET 'K1_VCC' L1-1 C311-1 K1-2 # Vcc input power to Converter K1 NET 'K1_VCC' C314-1 C315-1 C316-1 # and its filter capacitors NET 'K1_VCC' C317-2 C318-2 C319-2 NET 'GROUND' C311-2 # Ground the input NET 'GROUND' C314-2 C315-2 C316-2 # power filter NET 'GROUND' C317-1 C318-1 C319-1 # capacitors # Vcc +5V Input Power to Converter K2 NET 'K2_VCC' L3-1 C331-1 K2-2 # Vcc input power to Converter K1 NET 'K2_VCC' C334-1 C335-1 C336-1 # and its filter capacitors NET 'K2_VCC' C337-2 C338-2 C339-2 NET 'GROUND' C331-2 # Ground the input NET 'GROUND' C334-2 C335-2 C336-2 # power filter NET 'GROUND' C337-1 C338-1 C339-1 # capacitors # Vcc +5V Input Power to Converter K3 NET 'K3_VCC' L5-1 C351-1 K3-2 # Vcc input power to Converter K1 NET 'K3_VCC' C354-1 C355-1 C356-1 # and its filter capacitors NET 'K3_VCC' C357-2 C358-2 C359-2 NET 'GROUND' C351-2 # Ground the input NET 'GROUND' C354-2 C355-2 C356-2 # power filter NET 'GROUND' C357-1 C358-1 C359-1 # capacitors # Vcc +5V Input Power to Converter K4 NET 'K4_VCC' L7-1 C371-1 K4-2 # Vcc input power to Converter K1 NET 'K4_VCC' C374-1 C375-1 C376-1 # and its filter capacitors NET 'K4_VCC' C377-2 C378-2 C379-2 NET 'GROUND' C371-2 # Ground the input NET 'GROUND' C374-2 C375-2 C376-2 # power filter NET 'GROUND' C377-1 C378-1 C379-1 # capacitors # Converter Ground Pins and Voltage Set Resistors - all 4 converters NET 'K1_VSET' K1-4 R311-2 # K1 V-Set Resistor NET 'GROUND' K1-1 R311-1 # K1 Grounds NET 'K2_VSET' K2-4 R331-2 # K2 V-Set Resistor NET 'GROUND' K2-1 R331-1 # K2 Grounds NET 'K3_VSET' K3-4 R351-2 # K3 V-Set Resistor NET 'GROUND' K3-1 R351-1 # K3 Grounds NET 'K4_VSET' K4-4 R371-2 # K4 V-Set Resistor NET 'GROUND' K4-1 R371-1 # K4 Grounds # Converter Output to the input of its output filter NET 'K1_OUT' K1-5 C312-2 L2-2 # Output from Converter K1 NET 'K1_OUT' C320-2 C321-2 C322-2 # and its filter components NET 'K1_OUT' C323-1 C324-1 NET 'GROUND' C312-1 # Ground the converter K1 NET 'GROUND' C320-1 C321-1 C322-1 # output filter capacitors NET 'GROUND' C323-2 C324-2 NET 'K2_OUT' K2-5 C332-2 L4-2 # Output from Converter K2 NET 'K2_OUT' C340-2 C341-2 C342-2 # and its filter components NET 'K2_OUT' C343-1 C344-1 NET 'GROUND' C332-1 # Ground the converter K2 NET 'GROUND' C340-1 C341-1 C342-1 # output filter capacitors NET 'GROUND' C343-2 C344-2 NET 'K3_OUT' K3-5 C352-2 L6-2 # Output from Converter K3 NET 'K3_OUT' C360-2 C361-2 C362-2 # and its filter components NET 'K3_OUT' C363-1 C364-1 NET 'GROUND' C352-1 # Ground the converter K3 NET 'GROUND' C360-1 C361-1 C362-1 # output filter capacitors NET 'GROUND' C363-2 C364-2 NET 'K4_OUT' K4-5 C372-2 L8-2 # Output from Converter K4 NET 'K4_OUT' C380-2 C381-2 C382-2 # and its filter components NET 'K4_OUT' C383-1 C384-1 NET 'GROUND' C372-1 # Ground the converter K4 NET 'GROUND' C380-1 C381-1 C382-1 # output filter capacitors NET 'GROUND' C383-2 C384-2 # Converter Output Filter Output NET 'VTT_1' L2-1 C313-2 # Converter K1 Output # VTT_1 to the Control Bus Drivers NET 'VEE_1' L4-1 C333-2 # Converter K2 Output # VEE_1 to the Control Bus Drivers NET 'VTT_2' L6-1 C353-2 # Converter K3 Output # VTT_2 to the Generic LVDS<-->ECL NET 'VEE_2' L8-1 C373-2 # Converter K4 Output # VEE_2 to the Generic LVDS<-->ECL NET 'GROUND' C313-1 C333-1 # Ground these filter caps. NET 'GROUND' C353-1 C373-1 # # CB_Fan PCB Nets # # Power and ByPass Capacitors for the SBC Read-Now Busy Chips # ----------------------------------------------------------------- # # # Original Rev. 3-Mar-2012 # Most Recent Rev. 14-Aprr-2012 # # # # This file is for the 8 Control Bus version of the CB-Fan card. # # # This section of the CB-Fan net list contains all of the # power and ground pin connections to the 65LVDS391 Quad LVDS # Driver chips and the 74LVC541A Octal Buffer chips and # their Vdd Vcc bypass capacitors. SBC Read-Now and Busy # # The 74LVC541A octal buffer is U51 the Read_Now Pre-Driver # The 74LVC541A octal buffer is U52 the Read_Now Driver # # The 65LVDS391 quad LVDS driver is U53 \/ SBC_n_Busy Driver # The 65LVDS391 quad LVDS driver is U54 /\ back to Control H-Clk # # The 65LVDT34D dual LVDS receiver is U55 bring in the "5th" control # signal for Read_Now # # The 74LVC541As NET 'VDD' U51-20 U52-20 NET 'GROUND' U51-10 U52-10 # The 65LVDS391s NET 'VDD' U53-4 U54-4 NET 'GROUND' U53-5 U54-5 # The 65LVDT34D NET 'VDD' U55-1 NET 'GROUND' U55-4 # 74LVC541A Ceramic ByPass Capacitors on Vdd NET 'VDD' C101-2 C102-2 C103-1 C104-1 NET 'GROUND' C101-1 C102-1 C103-2 C104-2 # 65LVDS391 Ceramic ByPass Capacitors on Vdd NET 'VDD' C105-2 C106-1 C107-2 C108-1 NET 'GROUND' C105-1 C106-2 C107-1 C108-2 # 65LVDT34D Ceramic ByPass Capacitors on Vdd NET 'VDD' C109-1 C110-1 NET 'GROUND' C109-2 C110-2 # # CB_Fan PCB Nets # # Power and ByPass Capacitors for General Purpose Input 4 Signals Chips # ------------------------------------------------------------------------ # # # Original Rev. 9-Mar-2012 # Most Recent Rev. 14-Apr-2012 # # # # This file is for the 8 Control Bus version of the CB-Fan card. # # This section of the CB-Fan net list contains all of the # power and ground pin connections for the LVDS Driver for the # 4 General Purpose Input Signals. # # The 65LVDS391 quad LVDS Driver is U56 - 4 General Purpose Input signals # back to the Control H-Clk card # The 65LVDS391s NET 'VDD' U56-4 NET 'GROUND' U56-5 # 65LVDS391 Ceramic ByPass Capacitors on Vdd NET 'VDD' C121-2 C122-1 NET 'GROUND' C121-1 C122-2