# # CB_Fan PCB Nets # # Control Signal LVDS Receive & Fanout Nets # ------------------------------------------- # # # Original Rev. 24-Jan-2012 # Most Recent Rev. 16-Apr-2012 # # # # This file is for the 8 Control Bus version of the CB-Fan card. # # # This section of the CB-Fan net list receives the 4 Control Signal: # CRST, TRIG, CLR, and CLK from the Control H-Clk card and fans # them out to the sections that drive the 16 Control Busses. # Receive CRST by a DS90LV110T chip U1 and terminate the signal NET 'CRST_IN_DIR' J6-1 R1-2 # CRST Input Signal Direct NET 'CRST_IN_CMP' J6-2 R1-1 # CRST Input Signal Complement NET 'CRST_IN_DIR' U1-7 # CRST Input Signal Direct NET 'CRST_IN_CMP' U1-8 # CRST Input Signal Complement NET 'CRST_1_DIST_DIR' U1-11 # CRST Distribute 1 Direct NET 'CRST_1_DIST_CMP' U1-12 # CRST Distribute 1 Complement NET 'CRST_2_DIST_DIR' U1-13 # CRST Distribute 2 Direct NET 'CRST_2_DIST_CMP' U1-14 # CRST Distribute 2 Complement NET 'CRST_3_DIST_DIR' U1-16 # CRST Distribute 3 Direct NET 'CRST_3_DIST_CMP' U1-15 # CRST Distribute 3 Complement NET 'CRST_4_DIST_DIR' U1-18 # CRST Distribute 4 Direct NET 'CRST_4_DIST_CMP' U1-17 # CRST Distribute 4 Complement NET 'CRST_5_DIST_DIR' U1-20 # CRST Distribute 5 Direct NET 'CRST_5_DIST_CMP' U1-19 # CRST Distribute 5 Complement NET 'CRST_6_DIST_DIR' U1-24 # CRST Distribute 6 Direct NET 'CRST_6_DIST_CMP' U1-23 # CRST Distribute 6 Complement NET 'CRST_7_DIST_DIR' U1-26 # CRST Distribute 7 Direct NET 'CRST_7_DIST_CMP' U1-25 # CRST Distribute 7 Complement NET 'CRST_8_DIST_DIR' U1-28 # CRST Distribute 8 Direct NET 'CRST_8_DIST_CMP' U1-27 # CRST Distribute 8 Complement NET 'CRST_9_DIST_DIR' U1-1 # CRST Distribute 9 Direct NET 'CRST_9_DIST_CMP' U1-2 # CRST Distribute 9 Complement NET 'CRST_10_DIST_DIR' U1-3 # CRST Distribute 10 Direct NET 'CRST_10_DIST_CMP' U1-4 # CRST Distribute 10 Complement # Receive TRIG by a DS90LV110T chip U2 and terminate the signal NET 'TRIG_IN_DIR' J6-3 R2-2 # TRIG Input Signal Direct NET 'TRIG_IN_CMP' J6-4 R2-1 # TRIG Input Signal Complement NET 'TRIG_IN_DIR' U2-7 # TRIG Input Signal Direct NET 'TRIG_IN_CMP' U2-8 # TRIG Input Signal Complement NET 'TRIG_1_DIST_DIR' U2-11 # TRIG Distribute 1 Direct NET 'TRIG_1_DIST_CMP' U2-12 # TRIG Distribute 1 Complement NET 'TRIG_2_DIST_DIR' U2-13 # TRIG Distribute 2 Direct NET 'TRIG_2_DIST_CMP' U2-14 # TRIG Distribute 2 Complement NET 'TRIG_3_DIST_DIR' U2-16 # TRIG Distribute 3 Direct NET 'TRIG_3_DIST_CMP' U2-15 # TRIG Distribute 3 Complement NET 'TRIG_4_DIST_DIR' U2-18 # TRIG Distribute 4 Direct NET 'TRIG_4_DIST_CMP' U2-17 # TRIG Distribute 4 Complement NET 'TRIG_5_DIST_DIR' U2-20 # TRIG Distribute 5 Direct NET 'TRIG_5_DIST_CMP' U2-19 # TRIG Distribute 5 Complement NET 'TRIG_6_DIST_DIR' U2-24 # TRIG Distribute 6 Direct NET 'TRIG_6_DIST_CMP' U2-23 # TRIG Distribute 6 Complement NET 'TRIG_7_DIST_DIR' U2-26 # TRIG Distribute 7 Direct NET 'TRIG_7_DIST_CMP' U2-25 # TRIG Distribute 7 Complement NET 'TRIG_8_DIST_DIR' U2-28 # TRIG Distribute 8 Direct NET 'TRIG_8_DIST_CMP' U2-27 # TRIG Distribute 8 Complement NET 'TRIG_9_DIST_DIR' U2-1 # TRIG Distribute 9 Direct NET 'TRIG_9_DIST_CMP' U2-2 # TRIG Distribute 9 Complement NET 'TRIG_10_DIST_DIR' U2-3 # TRIG Distribute 10 Direct NET 'TRIG_10_DIST_CMP' U2-4 # TRIG Distribute 10 Complement # Receive CLR by a DS90LV110T chip U3 and terminate the signal NET 'CLR_IN_DIR' J6-5 R3-2 # CLR Input Signal Direct NET 'CLR_IN_CMP' J6-6 R3-1 # CLR Input Signal Complement NET 'CLR_IN_DIR' U3-7 # CLR Input Signal Direct NET 'CLR_IN_CMP' U3-8 # CLR Input Signal Complement NET 'CLR_1_DIST_DIR' U3-11 # CLR Distribute 1 Direct NET 'CLR_1_DIST_CMP' U3-12 # CLR Distribute 1 Complement NET 'CLR_2_DIST_DIR' U3-13 # CLR Distribute 2 Direct NET 'CLR_2_DIST_CMP' U3-14 # CLR Distribute 2 Complement NET 'CLR_3_DIST_DIR' U3-16 # CLR Distribute 3 Direct NET 'CLR_3_DIST_CMP' U3-15 # CLR Distribute 3 Complement NET 'CLR_4_DIST_DIR' U3-18 # CLR Distribute 4 Direct NET 'CLR_4_DIST_CMP' U3-17 # CLR Distribute 4 Complement NET 'CLR_5_DIST_DIR' U3-20 # CLR Distribute 5 Direct NET 'CLR_5_DIST_CMP' U3-19 # CLR Distribute 5 Complement NET 'CLR_6_DIST_DIR' U3-24 # CLR Distribute 6 Direct NET 'CLR_6_DIST_CMP' U3-23 # CLR Distribute 6 Complement NET 'CLR_7_DIST_DIR' U3-26 # CLR Distribute 7 Direct NET 'CLR_7_DIST_CMP' U3-25 # CLR Distribute 7 Complement NET 'CLR_8_DIST_DIR' U3-28 # CLR Distribute 8 Direct NET 'CLR_8_DIST_CMP' U3-27 # CLR Distribute 8 Complement NET 'CLR_9_DIST_DIR' U3-1 # CLR Distribute 9 Direct NET 'CLR_9_DIST_CMP' U3-2 # CLR Distribute 9 Complement NET 'CLR_10_DIST_DIR' U3-3 # CLR Distribute 10 Direct NET 'CLR_10_DIST_CMP' U3-4 # CLR Distribute 10 Complement # Receive CLK by a DS90LV110T chip U4 and terminate the signal NET 'CLK_IN_DIR' J5-33 R4-2 # CLK Input Signal Direct NET 'CLK_IN_CMP' J5-34 R4-1 # CLK Input Signal Complement NET 'CLK_IN_DIR' U4-7 # CLK Input Signal Direct NET 'CLK_IN_CMP' U4-8 # CLK Input Signal Complement NET 'CLK_1_DIST_DIR' U4-11 # CLK Distribute 1 Direct NET 'CLK_1_DIST_CMP' U4-12 # CLK Distribute 1 Complement NET 'CLK_2_DIST_DIR' U4-13 # CLK Distribute 2 Direct NET 'CLK_2_DIST_CMP' U4-14 # CLK Distribute 2 Complement NET 'CLK_3_DIST_DIR' U4-16 # CLK Distribute 3 Direct NET 'CLK_3_DIST_CMP' U4-15 # CLK Distribute 3 Complement NET 'CLK_4_DIST_DIR' U4-18 # CLK Distribute 4 Direct NET 'CLK_4_DIST_CMP' U4-17 # CLK Distribute 4 Complement NET 'CLK_5_DIST_DIR' U4-20 # CLK Distribute 5 Direct NET 'CLK_5_DIST_CMP' U4-19 # CLK Distribute 5 Complement NET 'CLK_6_DIST_DIR' U4-24 # CLK Distribute 6 Direct NET 'CLK_6_DIST_CMP' U4-23 # CLK Distribute 6 Complement NET 'CLK_7_DIST_DIR' U4-26 # CLK Distribute 7 Direct NET 'CLK_7_DIST_CMP' U4-25 # CLK Distribute 7 Complement NET 'CLK_8_DIST_DIR' U4-28 # CLK Distribute 8 Direct NET 'CLK_8_DIST_CMP' U4-27 # CLK Distribute 8 Complement NET 'CLK_9_DIST_DIR' U4-1 # CLK Distribute 9 Direct NET 'CLK_9_DIST_CMP' U4-2 # CLK Distribute 9 Complement NET 'CLK_10_DIST_DIR' U4-3 # CLK Distribute 10 Direct NET 'CLK_10_DIST_CMP' U4-4 # CLK Distribute 10 Complement # Note: that the CLK signal comes from J5 pins 33-34. # J6 pins 7-8 is the Load Next Event signal # for the Scaler System. # There are vias by U2 and U4 to make available copies # of the TRG and CLK signals just in case they are needed # in an emergency in the future. # V1 & V2 provide an LVDS copy of the CLK signal. # V3 & V4 provide an LVDS copy of the TRG signal. NET 'CLK_10_DIST_DIR' V1-1 # CLK Distribute 10 Direct NET 'CLK_10_DIST_CMP' V2-1 # CLK Distribute 10 Complement NET 'TRIG_10_DIST_DIR' V3-1 # TRIG Distribute 10 Direct NET 'TRIG_10_DIST_CMP' V4-1 # TRIG Distribute 10 Complement