CB-Fan Card General Description ----------------------------------- Rev. 25-Mar-2012 The intent of this note is to provide a functional description of the CB-Fan card for the HAWC experiment. All requests for functionality on the CB-Fan card, through 3-Mar-2012, have been included in the current layout study for this card. The purpose of the CB-Fan card is to provide the required signal level conversion (LVDS to/from ECL and single ended 3.3V logic) and to provide the required grouping of signals into the various cables that are needed to connect the Control H-Clk card with the rest of the HAWC Trigger DAQ System. The current plan is to implement the CB-Fan card as a 6 layer design with 2 layers reserved for 100% ground planes and 2 other layers used mostly for power fills with some signal traces. The 2 outer layers will be used for the bulk of the signal traces and the SMD pads. Much of the routing will be controlled impedance differential traces for either LVDS or ECL signals. As on the H-Clk card, through hole type components will be used for the many 0.1" x 0.1" 25 mil pin headers to reduce the risk of users damaging SMD type headers. The current layout study includes 414 components and 1335 traces. The layout challenges include the high amount of trace criss-cross involved in grouping the signals into the various cables and the distribution of the 6 different power buses on two layers. CB-Fan is a 6U VME type card. It is a double wide card to allow space for all of the cables that connect to it. It draws +5.0V Vcc and +3.3V Vdd power from the VME Bus. Except for the power and the 47 ground pin connections to the VME bus the only other connection that it makes to the bus is to pass through the 4 Bus Grant signals and the Interrupt Acknowledge signal. As it requires a +3.3V Vdd supply it will need to be installed in a VME-64X type of VME crate. The intent of this note is to provide a functional description of each of the sections of the CB-Fan card. Approval of this functional description will release the current design study for actual pcb layout. The following functional descriptions are complicated because of the many options that are necessary on the CB-Fan card at this time to support the various possible ways that the HAWC DAQ system may eventually be built and operated. I will start with a description of one of the simple sections of the card and end with a list of known limitation on how the current design can be used. Generic 16 Bit Wide LVDS to/from Diff ECL Conversion ---------------------------------------------------- The Generic LVDS <--> ECL Conversion section of the CB-Fan card is independent of all of the other functions on this card. The 34 pin header J9 is the 16 bit wide ECL connection. The pinout of J9 is such that it may be plugged directly into a commercial ECL-NIM-TTL module, e.g. Philips model 726, using a standard 34 conductor twist-flat cable. The J9 ECL connector provides 110 Ohm termination across each differential pair when this port is an input. It provides termination and ECL pull-down current when this port is an output. The 34 pin header J10 is the 16 bit wide LVDS connection. The pinout of J10 is such that it may be plugged directly into a GPIO connector on a H-Clk card using a standard 34 conductor twist-flat cable. The J10 LVDS connector always includes a 110 Ohm terminator across each LVDS pair. The use of these terminators when J10 is an input port is straight forward. When J10 is an output port these terminators remain in place which is OK because the LVDS driver that is used is a type "M" driver, i.e. a 6 mA cable type LVDS driver which is appropriate for this application. At a given time, all 16 bits are either converting from LVDS to Diff ECL or are converting from Diff ECL to LVDS. The direction of the conversion can easily be changed in the field without soldering or any special tools. To change directions, one jumper cap is moved and 8 socketed SIP resistor networks are swapped. The conversion uses National DS91M040TSQ LVDS parts and Fairchild 100398QC ECL parts. This LVDS <--> ECL converter section uses its own -4.5V Vee and -2.0V Vtt power supplies that get their input power from the +5V VME power bus. The Vtt supply is turned off when the converter is run in the Diff ECL to LVDS direction. Eight Regular Control Buses --------------------------- A main function of the CB-Fan card is to assembly the set of signals, called a Control Bus, that runs to each CAEN model 1190 TDC module and to any other components of the HAWC Trig/DAQ system that are centrally coordinated by the Control H-Clk card. A separate Control Bus runs to each CAEN TDC card or other Trig/DAQ component that is centrally controlled. As defined by CAEN, each Control Bus consists of the following signals: CRST, TRG, CLR, CLK, Almost_full_1, and ALMOST_FULL_2. The CRST, TRG, CLR, and CLK signals flow from the Control H-Clk card to the Trig/DAQ component that is being controlled by it. The ALMOST_FULL_1 and ALMOST_FULL_2 signals run from the Trig/DAQ component back to the Control H-Clk card. The CRST, TRG, CLR, and CLK signals are common to all 8 Control Buses that are provided by each CB-Fan card. The ALMOST_FULL_1 and ALMOST_FULL_2 signals are unique to each Control Bus. The ALMOST_FULL_1 and ALMOST_FULL_2 signals flow separately back to the Control H_Clk card. The Control Buses that run to the CAEN TDCs use Diff ECL signal levels. Other Trig/DAQ components will require LVDS signal level Control Buses. The CB-Fan documentation names the Control Buses provided by each CB-Fan card #1 through #8. Control Buses #1 and #2 come from connectors J1 and J2. These 2 Control Buses are LVDS signal level. Control Buses #3 through #8 are ECL signal level and come from connectors J3 and J4. The CRST, TRG, and CLR signals are received on the CB-Fan card on connector J6 as LVDS signals coming from the Control H_Clk card. The CLK signal arrives on the CB-Fan card on the 17th pin pair of its J5 connector. Receiving the 40 MHz CLK in this way makes use the feature of the H-Clk card that all of its GPIO connectors provide the 40 MHz Clk on pin pair 17. The ALMOST_FULL_1 and ALMOST_FULL_2 signal flow out of the CB-Fan card on connector J5 on their path back to the Control H-Clk card. See the note later in this document about an alternate use of the J5 pins and signal path that carry the ALMOST_FULL_2 signals back to the Control H-Clk card. The fanout of the CRST, TRG, CLR, and CLK signals is performed by National DS90LV110T chips. The LVDS to Diff ECL conversion of these signals is done by TI 65LVDT34D and Fairchild 100324QC chips. These Control Bus Diff ECL drivers have their own -2V Vtt and -4.5V Vee power supplies that are themselves powered from the VME +5V power bus. The CB-Fan card provides pull-down current on these SCL outputs. One Special Control Bus for the Scaler System --------------------------------------------- Each CB-Fan card provides a 9th special Control Bus that is intended for the Scaler System. This special Control Bus for the Scaler System is a Diff ECL signal level bus that comes from connector J8 on the CB-Fan card. This special Control Bus has the following features: - It does not use the TRG signal that is common to the 8 other normal Control Buses. In place of the TRG signal it uses the LOAD_NEXT_EVENT signal. The LOAD_NEXT_EVENT signal arrives from the Control H-Clk card on the 4th pin pair of connector J6. - There is a jumper selectable option to either send or to lock LOW the CRST and CLR signal on this special Control Bus for the Scaler System. If these signal are send to the Scaler System then they are exactly the same CRST and CLR signals that are common to the 8 normal Control Buses. The jumpers to select either sending or locking LOW these 2 signals on the Scaler System Control Bus require soldering to change them. - The ALMOST_FULL_1 and ALMOST_FULL_2 signals from the Scaler System are returned to the Control H-Clk card on a separate path from that used by the 8 normal Control Buses. The Scaler System Almost Full signals are sent to the Control H-Clk card from connector J7 on the CB-Fan card. Please see the notes later in the document that describe other uses of the 4 signals that can be sent to the Control H-Clk card from the J7 connector. Support for SBCs_Read_Now and SBC_n_Busy ------------------------------------------- Each CB-Fan card has the facilities to send a common SBCs_READ_NOW signal to 8 SBCs and to receive a separate SBC_n_BUSY signal from each of these 8 SBCs. These signals are single ended 3.3V logic levels. Connector J11 is used to connect the SBCs_READ_NOW and the SBC_n_BUSY signals to the CB-Fan card. These signals use the odd numbered pin in connector J11. All of the even numbered pins of J11 are grounded. Each copy of the SBCs_READ_NOW signal has its own driver and 110 Ohm back termination resistor. The 8 copies of the SBCs_READ_NOW signal are driven by a 74LVC541A chip. The 8 separate SBC_n_BUSY signals are received by a pair of 65LVDS391 chips and sent back to the Control H-Clk card as LVDS signals. Features of the SBCs_READ_NOW and SBC_n_BUSY signal signals: - The SBCs_READ_NOW signal comes from the Control H-Clk card. The CB-Fan card provides two ways that it can receive this signal. 1. In a "full system" using 4 CB_Fan cards, each CB_Fan card can receive only 4 control signals from the Control H-Clk card on its J6 connector. The 4th pin pair on J6 that normally receives the LOAD_NEXT_EVENT signal (which is only needed on 1 of the 4 CB_Fan cards) will be used to carry the SBCs_READ_NOW signal to the other 3 CB_Fan cards. This allows the system to have 1 CB_Fan card that provides the special Control Bus for the Scaler System and 3 CB-Fan cards that provide connections to manage up to 24 SBCs. Recall that the FPGA on the Control H-Clk card can send different signals to different CB_Fan cards on their various J6 pin pairs. 2. In a "small system" using only 1, 2, or 3 CB_Fan cards there is room on their J6 connectors to send a 5th control signal from the Control H-Clk card to each of the 1, 2, or 3 CB-Fan cards. Thus a separate SBCs_READ_NOW signal can be sent from the Control H-Clk card to these CB-Fan cards. That is, in a small system, a single CB-Fan card can provide both the special Scaler System Control Bus with its LOAD_NEXT_EVENT signal and it can provide the separate SBCs_READ_NOW function. Selecting to use either J6's 4th pin pair (that normally carries the LOAD_NEXT_EVENT signal) or to use J6's 5th pin pair (that is only available in systems with less than 4 CB-Fan cards) as the source of the SBCs_READ_NOW signal is made by a pair of jumpers that require soldering to move. The 5th pin pair on J6 is received by LVDS receiver U55. - The 8 separate SBC_n_BUSY signals are sent back to the Control H-Clk card on the same pins of connector J5 that are used to carry the 8 ALMOST_FULL_2 signals back to the Control H-Clk card. That is, a given CB-Fan card can be setup to send either the 8 SBC_n_BUSY signals or the 8 ALMOST_FULL_2 signals to the Control H-Clk card - it can not do both. Selection of which class of signals to send back to the Control H-Clk card is made by a set of jumpers that requires soldering to change. Four General Purpose Input Signals ---------------------------------- As described above, connector J7 can be used to send the ALMOST_FULL_1 and ALMOST_FULL_2 signals from the special Scaler System Control Bus back to the Control H-Clk card or it can be used to send up to 4 general purposes signals to the Control H-Clk card. A typical example of using one of these general purpose signals would be to send the LOAD_NEXT_EVENT_ENABLE signal to the Control H-Clk card. The general purpose signals that can be sent to the Control H-Clk card are received on the CB-Fan card by either connector J12 or J13. Connector J12 is used to receive up to 4 General Purpose Input signals when they are either LVDS or Diff ECL signal levels. Connector J13 is used to receive up to 4 General Purpose Input signals when they are single ended 3.3V logic signal levels. Solder type jumpers are used to select which signals are send back to the Control H-Clk card from connector J7. It is possible to setup a CB-Fan card so that it sends the ALMOST_FULL_1 and ALMOST_FULL_2 signals from the special Scaler System Control Bus to the Control H-Clk card and at the same time receives on either J12 or J13 up to 2 General Purpose Input signals that it also sends to the Control H-Clk card via J7 (e.g. the LOAD_NEXT_EVENT_ENABLE signal). LED Display ----------- The CB-Fan card has a simple front panel display of just 4 LEDs. Two green LEDs are used to show that the card is receiving +5.0V Vcc and +3.3V Vdd power from the VME backplane and that the fuses in these buses have not opened. A red LED is used to show that the CB-Fan card is receiving and distributing the 40 MHz Clock signal. Another red LED flashes ON for 100 msec each time that the CB-Fan card receives and distributes a TRG signal. There are no other front panel displays or any front panel controls. Known Limitations ----------------- The CB-Fan card can not sent back to the Control H-Clk card both the 8 ALMOST_FULL_2 signals and the 8 SBC_n_BUSY signals. The card may be setup via solder type jumpers to do either one or the other of these functions but not both at the same time. The CB-Fan card can sent back to the Control H-Clk card either: 4 General Purpose Input signals or 2 General Purpose Input signals plus the ALMOST_FULL_1 & 2 signals from the special Control Bus #9 for the Scaler System. A "small system" with just one CB-Fan card working with the Control H-Clk card will be able to service: 8 normal Control Buses (6 ECL and 2 LVDS) plus the special ECL Control Bus #9 for the Scaler System 8 SBCs, i.e. send out 8 SBCs_READ_NOW signals and return to the Control H-Clk card 8 individual SBC_n_BUSY signals (assuming that the ALMOST_FULL_2 signals are not used) Return to the Control H-Clk both the ALMOST_FULL_1 & 2 signals from the special Control Bus for the Scaler System along with 2 General Purpose Input signals one of which we assume will be the LOAD_NEXT_EVENT_ENABLE signal. A "full system" with 4 CB-Fan cards working with the Control H-Clk card will be able to service: 32 normal Control Buses (24 ECL and 8 LVDS) plus the special ECL Control Bus #9 for the Scaler System 24 SBCs, i.e. send out 24 SBCs_READ_NOW signals and return to the Control H-Clk card 24 individual SBC_n_BUSY signals (assuming that the ALMOST_FULL_2 signals are not used) Return to the Control H-Clk both the ALMOST_FULL_1 & 2 signals from the special Control Bus for the Scaler System along with 14 General Purpose Input signals one of which we assume will be the LOAD_NEXT_EVENT_ENABLE signal. Connector Summary ----------------- All of these 10 pin, 16 pin, 34 pin, and 50 pin connectors are standard 0.1" x 0.1" 25 mil square pin male headers, polarized solder tail, without latch eject levers. Connector Type Function --------- ------ --------------------------- J1 16 pin Control Bus #1 LVDS signals J2 16 pin Control Bus #2 LVDS signals J3 50 pin Control Buses #3:#5 ECL signals J4 50 pin Control Buses #6:#8 ECL signals J5 34 pin Connector J5 carries: 8 individual ALMOST_FULL_1 signals from the CB-Fan to the Control H-Clk card and 8 individual Almost_FULL_2 signals or 8 individual SBC_n_BUSY signals from the CB-Fan to the Control H-Clk card and the 40 Mhz Clock from the Control H-Clk card to the CB-Fan card J6 10 pin 4 or 5 Control signals from the Control H-Clk card to the CB-Fan card: CRST, TRG, CLR, LOAD_NEXT_EVENT/SBCs_READ_NOW, and J6 5th pair SBCs_READ_NOW. The 5th pair is only used in some applications of the CB-Fan card. J7 10 pin 4 status signals running from the CB-Fan card back to the Control H-Clk card. These 4 signals can be either: Special Control Bus #9 for the Scaler System ALMOST_FULL_1 & 2 plus 2 CB-Fan General Purpose Input signals or 4 CB-Fan General Purpose Input signals. J8 16 pin Special Control Bus #9 for the Scaler System, ECL signals. The TRG signal on this Control Bus has been replaced with the LOAD_NEXT_EVENT signal. The CRST and CLR signals on this Control Bus are jumpered to either follow the other 8 Control Buses or else they are locked to the LOW level. The ALMOST_FULL_1 & 2 signals from this special Control Bus are returned to the Control H-Clk card via connector J7. J9 34 pin This is the ECL side of the Generic 16 bit LVDS <--> ECL converter. It is either an ECL input or an ECL output depending on which way the converter has been jumpered to operate. J10 34 pin This is the LVDS side of the Generic 16 bit LVDS <--> ECL converter. It is either an LVDS input or an LVDS output depending on which way the converter has been jumpered to operate. J11 34 pin This connector carries 8 copies of the SBCs_READ_NOW signal from the CB-Fan card to 8 SBCs and it carries 8 individual SBC_n_BUSY signals from the SBCs to the CB-Fan card. All of these signals are single ended 3.3V logic levels. J12 10 pin This connector receives up to 4 General Purpose Input signals on the CB-Fan card in either LVDS or ECL signal levels. Note that in some applications only 2 of these signals will be returned to the Control H-Clk card. A typical use is for the LOAD_NEXT_EVENT_ENABLE signal. J13 10 pin This connector receives up to 4 General Purpose Input signals on the CB-Fan card if they are in single ended 3.3V logic levels. Note that this is not a second set of 4 General Purpose Input signals rather this connector just allows an alternate signal level format of the one set of 4 General Purpose Input signals that can also be received by J12. P1 160 pin This is the VME upper "P1" connector. It supplies +5.0V Vcc, +3.3V Vdd, and ground connections to the CB-Fan card. It also jumpers the Bus Grant and Interrupt signals across this slot. P2 160 pin This is the VME lower "P2" connector. It supplies +5.0V Vcc and ground connections to the CB-Fan card. Assumed Modes of Use -------------------- The CB-Fan card must be able to fulfill the requirements of either the full Trigger DAQ system on the mountain in Mexico or the requirements of small test stand development systems at a number of different institutions. The CB-Fan card must be able to work in a DAQ environment that may or may not use it to control the SBCs.