# This is a Key In Net List file for the # H-CLK card's 40 MHz Phase Locked Loop # ----------------========================- # # Original Rev. 10-MAY-2011 # Most Recent Rev. 28-NOV-2011 # This file includes all the nets for the # 40 MHz PLL Clock Generator ######################################################## # # # Receive the PLL Reference and Feedback signals # # that are coming from the H-Clk's FPGA as # # LVDS signals on differential trace pairs. # # # ######################################################## NET 'PLL_REF_DIR' U221-8 R229-1 # PLL Phase Comparator Reference DIR NET 'PLL_REF_CMP' U221-7 R229-2 # PLL Phase Comparator Reference CMP NET 'PLL_REF_RCVD' U221-2 # Received PLL Reference Signal NET 'PLL_FBK_DIR' U221-6 R230-1 # PLL Phase Comparator Reference DIR NET 'PLL_FBK_CMP' U221-5 R230-2 # PLL Phase Comparator Reference CMP NET 'PLL_FBK_RCVD' U221-3 # Received PLL Feedback Signal NET 'VDD_LOGIC' U221-1 # Vdd for LVDS Receiver NET 'GROUND' U221-4 # Gnd for LVDS Receiver NET 'VDD_LOGIC' C227-1 C228-1 # ByPass Caps for U221 NET 'GROUND' C227-2 C228-2 # ######################################################## # # # PLL Phase Detector U222 XOR # # # ######################################################## NET 'PLL_REF_RCVD' U222-4 # Phase Comparator Reference Signal NET 'PLL_FBK_RCVD' U222-5 U222-10 # Phase Comparator Feedback Signal NET 'GROUND' U222-9 # Ground other Volt Ref XOR input NET 'PHASE_DET_OUT' U222-6 # Phase-Detector output NET 'LOOP_FILTER_REF' U222-8 # Reference Voltage output NET 'GROUND' U222-1 U222-2 # Ground some unused XOR inputs NET 'VCC_PLL' U222-12 U222-13 # VCC_PLL some unused XOR inputs NET 'VCC_PLL' U222-14 # Vcc for Phase Detector NET 'GROUND' U222-7 # Gnd for Phase Detector NET 'VCC_PLL' C229-1 C230-1 C231-1 # ByPass Caps for U222 NET 'GROUND' C229-2 C230-2 C231-2 # ######################################################## # # # PLL Loop Filter U223 # # # ######################################################## # Non-Inverting side of the Loop Filter Op-Amp NET 'LOOP_FILTER_REF' R222-1 # Reference to input resistor NET 'LF_FLT_PLS' R222-2 C222-1 R224-1 # Filter on + side input NET 'GROUND' C222-2 # Ground the filter capacitor NET 'LF_OPAMP_PLUS_IN' C224-1 U223-3 R224-2 # Op-Amp non-invert input NET 'GROUND' C224-2 # Ground the filter capacitor # Input to the Inverting side of the Loop Filter Op-Amp NET 'PHASE_DET_OUT' R221-1 # Phase Det to input resistor NET 'LF_FLT_NEG' R221-2 C221-1 R223-1 # Filter on - side input NET 'GROUND' C221-2 # Ground the filter capacitor NET 'LF_OPAMP_NEG_IN' U223-4 R223-2 # Op-Amp invert input # Loop Filter Op-Amp Feadback Network NET 'LF_OPAMP_NEG_IN' C223-2 R225-2 # Op-Amp invert input NET 'LF_OPAMP_OUT' U223-1 C223-1 C225-2 # Op-Amp Output NET 'LF_FB_RC_TIE' R225-1 C225-1 # Connect feedback R and C # Connect the Loop Filter output to the VCXO Control Input NET 'LF_OPAMP_OUT' R226-1 # Loop Filter output to VCXO Input Filter # Connect the Loop Filter output to the PLL Monitoring NET 'LF_OPAMP_OUT' R227-1 # Loop Filter output isolation resistor NET 'MONITOR_ISO' R227-2 # Jump to the 2nd Monitor Isolation resistor NET 'MONITOR_ISO' R231-2 # 2nd PLL Monitor Isolation resistor NET 'MONITOR_PLL' R231-1 # Connections for PLL Monitor # Connect the Loop Filter power and ground and bypass capacitors NET 'VCC_PLL' U223-6 # Vcc for the Loop Filter Op-Amp NET 'GROUND' U223-2 # Gnd for the Loop Filter Op-Amp NET 'VCC_PLL' C232-1 C233-1 C234-1 # ByPass Caps for U223 NET 'GROUND' C232-2 C233-2 C234-2 # ######################################################## # # # PLL Voltage Controlled Crystal Oscillator U224 # # # ######################################################## # Pin #2 is the Enable/Disable pin. High --> Enable Output. # Pin #5 has no internal connection and it will be left floating. # Pin #1 Control Input, Pin #3 Ground, Pin #4 Output, Pin #6 Vcc NET 'VCXO_CTRL_IN' R226-2 C226-1 # Signal to the VCXO Control Input NET 'GROUND' C226-2 # Ground the filter capacitor NET 'VCXO_CTRL_IN' U224-1 # VCXO Control Input pin NET 'VCXO_ENBL' U224-2 R228-1 # VCXO Enable pin NET 'VCXO_WFRM' U224-4 # VCXO Output signal NET 'VCC_PLL' U224-6 R228-2 # Vcc for the VCXO NET 'GROUND' U224-3 # Gnd for the VCXO NET 'VCC_PLL' C235-1 C236-1 C237-1 # ByPass Caps for U224 NET 'GROUND' C235-2 C236-2 C237-2 # ################################################### # # # PLL Isolated +5 Volt PLL Vcc # # # ################################################### # The Phase Detector, Loop Filter Op-Amp, and the VCX0 # are powered from an isolated +5 Volt PLL Vcc supply. # # This PLL Vcc supply is just a section "moated" out of the # VCC_PLL plane. In the net list these PLL Vcc connections # appear as connected to the standard VCC_PLL supply. # # There is an inductor that connects the PLL VCC plane to the # standard VCC_PLL plane, i.e. it crosses the moat. NET 'VCC_LOGIC' I221-2 # Power source from VCC_LOGIC plane fill NET 'VCC_PLL' I221-1 # Power to the PLL VCC_PLL plane fill NET 'VCC_PLL' C238-1 # PLL Vcc Tantalum cap NET 'GROUND' C238-2 # bypass caps grounds NET 'VCC_PLL' C239-1 C240-1 # PLL Vcc Ceramic caps NET 'GROUND' C239-2 C240-2 # bypass caps grounds NET 'VCC_PLL' C241-1 C242-1 # PLL Vcc Ceramic caps NET 'GROUND' C241-2 C242-2 # bypass caps grounds NET 'VCC_PLL' C243-1 C244-1 # PLL Vcc Ceramic caps NET 'GROUND' C243-2 C244-2 # bypass caps grounds NET 'VCC_PLL' C245-1 # PLL Vcc Ceramic caps NET 'GROUND' C245-2 # bypass caps grounds