Subsystem Name: GPS Time via TDC Module part of WBS ??? Responsible Person: Dan Edmunds (MSU) Agreed By: Date: 27-March-2010 Document Version: 0.1 First Draft Inputs: [R] GPS antenna signal Outputs: [R] 1 pps, 100 pps, 10 MHz, and 40 MHz timing signals controlled by the GPS clock. These signals will be provided at the appropriate signal level for external fanout to the Scaler and TDC DAQ systems. [R] Provide signals to allow the high resolution bits of the GPS based event timestamp to be readout via a CAEN VX1190 TDC module. [R] Provide standard Network Time Protocol (NTP) time service to allow the synchronization of computers in the HAWC DAQ system. [R] With every trigger to the HAWC TDCs, this system will provide a GPS based timestamp that is readout in part via NTP controlled time in the DAQ computer and in part via the high resolution timestamp bits encoded in a normal TDC's event data. Assumed Environment: [R] Rack space and power for the GPS clock. TDC crate slot for the timestamp TDC module. VME Crate space for the CAEN V1495 module that makes the signals that control the timestamp TDC. Control/Configuration/Download: [R] There are numerous options of the GPS clock system itself and of the NTP server that need to be setup. [R] The V1495 module will need to have its firmware downloaded and numerous control registers setup. Functionality: [R] This system will provide a GPS controlled time base for the HAWC TDC and Scaler DAQ systems. This consists of 1 pps, 100 pps, 10 MHz, and 40 MHz synchronous timing signals. [R] With each trigger to the HAWC TDC system, this system will provide a GPS controlled timestamp that is readout from a standard TDC module in the same way as the rest of the TDC event data. Performance Needed: [R] The time stamp will provide at the resolution of CAEN TDC module (expected to be 200 psec) and with an absolute accuracy of 1 usec rms. Required/Goals for VAMOS: none Required/Goals for HAWC30: none Required/Goals for HAWC100: [R] This full system will be installed and used in HAWC100. Required/Goals for HAWC300: [R] This full system will be installed and used in HAWC300. Unit Testing Plans: Initial integration and testing of the components that make up this system will be done at MSU. Integration Testing Plans: The final "DAQ system readout testing" of this system will be done at a location that provides HAWC DAQ computer readout of multiple TDC modules. Baseline Design: A CAEN 1495 FPGA module is used to form the control signals that go to the TDC module that reads out the event timestamp. The GPS time code input to this FPGA module is either parallel code or a direct digital version of IRIG-B122 code. Depending upon the GPS clock that is selected the 40 MHz will either be directly generated by it or else the 40 MHz will be generated in a module built at MSU. Possible GPS clock modules include: Symmetricon IRIG GPS clock and their model TCT parallel module, Brandywine Communications model M210 with options 09, 15, and 27, or MicroSystem model SW1050 GPS controlled NTP and IRIG server with either and SR1322 or SR1321-1 IRIG-b to parallel Equipment Budget: ?? Personnel Budget: ??