Index of /people/edmunds/LArTPC/LArTPC_FPGA_Designs/LArTPC_T7_Design
Name Last modified Size Description
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ADC_Data_Receiver.pdf 2009-06-16 13:37 33K
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ADC_Data_Receiver.ps 2009-06-16 13:36 112K
Access_Connector.pdf 2009-06-16 13:25 17K
Access_Connector.ps 2009-06-16 13:23 57K
Align_ADC_Data.pdf 2009-06-16 13:38 27K
Align_ADC_Data.ps 2009-06-16 13:36 86K
BX_Number_Gen.pdf 2009-06-16 14:18 32K
BX_Number_Gen.ps 2009-06-16 14:17 109K
Chan_Lnk_Output_Shifter_1_of_2.pdf 2009-06-16 14:26 47K
Chan_Lnk_Output_Shifter_1_of_2.ps 2009-06-16 14:25 159K
Chan_Lnk_Output_Shifter_2_of_2.pdf 2009-06-16 14:26 24K
Chan_Lnk_Output_Shifter_2_of_2.ps 2009-06-16 14:25 80K
Channel_Link_Driver_1_of_2.pdf 2009-06-16 14:18 43K
Channel_Link_Driver_1_of_2.ps 2009-06-16 14:17 147K
Channel_Link_Driver_2_of_2.pdf 2009-06-16 14:18 40K
Channel_Link_Driver_2_of_2.ps 2009-06-16 14:17 138K
Clock_Rec_Dist.pdf 2009-06-16 14:25 26K
Clock_Rec_Dist.ps 2009-06-16 14:25 85K
Control_Reg_16_Bit.pdf 2009-06-16 14:37 17K
Control_Reg_16_Bit.ps 2009-06-16 14:37 57K
Data_Path.pdf 2009-06-17 11:13 60K
Data_Path.ps 2009-06-17 11:12 207K
Double_Buf_Update_Enable.pdf 2009-06-16 14:37 21K
Double_Buf_Update_Enable.ps 2009-06-16 14:37 68K
Drive_ADC_Clock.pdf 2009-06-16 14:46 22K
Drive_ADC_Clock.ps 2009-06-16 14:45 75K
Frame_Shifter_and_Chan_Lnk.pdf 2009-06-16 14:51 40K
Frame_Shifter_and_Chan_Lnk.ps 2009-06-16 14:51 137K
L1_Top.pdf 2009-06-17 11:13 95K
L1_Top.ps 2009-06-17 11:12 321K
LED_Driver.pdf 2009-06-16 15:06 20K
LED_Driver.ps 2009-06-16 15:05 66K
Mem_A_Port_Adrs_Ctrl_1_of_2.pdf 2009-06-16 15:06 49K
Mem_A_Port_Adrs_Ctrl_1_of_2.ps 2009-06-16 15:06 163K
Mem_A_Port_Adrs_Ctrl_2_of_2.pdf 2009-06-16 15:06 32K
Mem_A_Port_Adrs_Ctrl_2_of_2.ps 2009-06-16 15:06 107K
Mem_Blk_2k_10.pdf 2009-06-16 15:07 45K
Mem_Blk_2k_10.ps 2009-06-16 15:06 151K
OCB_IF_1_of_6.pdf 2009-06-16 14:09 37K
OCB_IF_1_of_6.ps 2009-06-16 14:09 123K
OCB_IF_2_of_6.pdf 2009-06-16 14:09 30K
OCB_IF_2_of_6.ps 2009-06-16 14:09 102K
OCB_IF_3_of_6.pdf 2009-06-16 14:09 38K
OCB_IF_3_of_6.ps 2009-06-16 14:09 132K
OCB_IF_4_of_6.pdf 2009-06-16 14:09 44K
OCB_IF_4_of_6.ps 2009-06-16 14:09 155K
OCB_IF_5_of_6.pdf 2009-06-16 14:09 24K
OCB_IF_5_of_6.ps 2009-06-16 14:09 80K
OCB_IF_6_of_6.pdf 2009-06-16 14:09 44K
OCB_IF_6_of_6.ps 2009-06-16 14:09 155K
OCB_IF_7_of_7.pdf 2009-06-16 14:09 28K
OCB_IF_7_of_7.ps 2009-06-16 14:09 95K
PRN_Generator.pdf 2009-06-16 15:20 30K
PRN_Generator.ps 2009-06-16 15:20 98K
PRN_Shift_Control.pdf 2009-06-16 15:21 20K
PRN_Shift_Control.ps 2009-06-16 15:20 67K
Pull_Up_16_Bit.pdf 2009-06-16 15:21 15K
Pull_Up_16_Bit.ps 2009-06-16 15:20 52K
SCLD_Rec_Dist.pdf 2009-06-16 15:21 26K
SCLD_Rec_Dist.ps 2009-06-16 15:20 89K
Shifter_for_One_Lane.pdf 2009-06-16 15:33 29K
Shifter_for_One_Lane.ps 2009-06-16 15:33 96K
Status_Reg_16_Bit.pdf 2009-06-16 15:33 14K
Status_Reg_16_Bit.ps 2009-06-16 15:33 48K
Status_to_BC_PAL.pdf 2009-06-16 15:33 17K
Status_to_BC_PAL.ps 2009-06-16 15:33 56K
TT_Cell_1_of_9.pdf 2009-06-17 11:14 44K
TT_Cell_1_of_9.ps 2009-06-17 11:12 146K
TT_Cell_2_of_9.pdf 2009-06-17 11:15 43K
TT_Cell_2_of_9.ps 2009-06-17 11:12 147K
TT_Cell_3_of_9.pdf 2009-06-16 15:49 24K
TT_Cell_3_of_9.ps 2009-06-16 15:49 78K
TT_Cell_4_of_9.pdf 2009-06-16 15:49 34K
TT_Cell_4_of_9.ps 2009-06-16 15:49 112K
TT_Cell_5_of_9.pdf 2009-06-16 15:49 30K
TT_Cell_5_of_9.ps 2009-06-16 15:49 99K
TT_Cell_6_of_9.pdf 2009-06-16 15:50 31K
TT_Cell_6_of_9.ps 2009-06-16 15:49 107K
TT_Cell_7_of_9.pdf 2009-06-16 15:50 22K
TT_Cell_7_of_9.ps 2009-06-16 15:49 71K
TT_Cell_8_of_9.pdf 2009-06-16 15:50 23K
TT_Cell_8_of_9.ps 2009-06-16 15:49 76K
TT_Cell_9_of_9.pdf 2009-06-16 15:50 45K
TT_Cell_9_of_9.ps 2009-06-16 15:49 152K
Timing_Generator_1_of_2.pdf 2009-06-16 15:34 61K
Timing_Generator_1_of_2.ps 2009-06-16 15:33 206K
Timing_Generator_2_of_2.pdf 2009-06-16 15:34 38K
Timing_Generator_2_of_2.ps 2009-06-16 15:33 130K