Milagro Electronics Study ---------------------------- Initial Rev. 21-AUG-2007 Current Rev. 20-MAR-2008 Observations: ------------- 1. At MSU we are working with Analog card SN 014 and Digital card SN 065. 2. The current requirements of the Analog card are significant and these currents cause a non trivial Voltage drop across the power input fuses and wire wound power chokes. On the Analog card that we are running I measured the following Voltage drops when the +5V and -5V Analog power supplies were adjusted so that there actually was +5.00V and -5.00V present on the card between the card's ground plane that the two power distribution planes. Item Measured Voltage Drop --------- --------------------- +5V Fuse 51 mV +5V Choke 8 mV Gnd Choke 2 mV -5V Fuse 64 mV -5V Choke 9 mV These Voltage drops scale about as the expected current draws of the Analog card scale, i.e 3.65 Amps of +5V and 4.25 Amps of -5V. Both fuses are rated for 5 Amps and as expected there is a proportionally greater drop across the fuse that is closer to blowing. - Running the fuses this close to their rated current must cause them to blow out from time to time for no explicit reason. - I assume that in the actual Milagro DAQ system that the backplane Analog power busses are running at something like +5.059 and -5.073 Volts to provide on card power supply close to its +5.000 and -5.000 Volt targets. - Note that the ground plane on the Analog card will be a few mV below the backplane common power return for the Analog power supplies - but this would not be a problem for the differential ECL signals running from the Analog card to the Digital card. 3. The -5.2V current requirement of the Digital card is significant and this current causes a non trivial Voltage drop across the power input fuse and wire wound power chokes. On the Digital card that we are running I measured the following Voltage drops when the -5.2V Digital power supply was adjusted so that there actually was -5.20V present on the card between its ground plane that the its Vee power distribution plane. Item Measured Voltage Drop ----------- --------------------- -5.2V Fuse 89 mV -5.2V Choke 11 mV Gnd Choke 11 mV - The -5.2V fuse on the Digital card is rated for 5 Amps. The expected current draw of the Digital card is 4.4 Amps. It would be typical for a fuse to blow out periodically for no reason when it is running this close to its rated current. - I assume that in the actual Milagro DAQ system that the backplane Digital power bus is running at something like -5.311 Volts to provide an on card Digital power supply close to its -5.200 Volt targets. - Note that the ground plane on the Digital card will be 11 mV or so below the backplane common power return for the Digital power supply - but this would not be a problem for the differential ECL signals running from the Analog card to the Digital card. 4. The ground plane of the Analog card and the ground plane of the Digital card are not tied together as far as i can figure out by ground pins that run directly through the backplane. Rather I believe that they are only tied together by connecting the return lines of the Analog and Digital power supplies. This was probably done (and makes sense) to help keep the Analog card quiet. You just need to make certain how you setup the power supply wiring when you make a test setup that runs these two cards together. 5. I had *assumed* that the Analog card High Threshold was only a couple of times bigger than the Low Threshold. With the Analog card thresholds adjusted to their normal values, i.e. Low Threshold test point = 30 mV High Threshold test point = 80 mV the actual ratio of thresholds is about 19.1 to 1 From the circuit design, the actual Low Threshold is 1.05 mV and the actual High Threshold is 20 mV. Initial Measurements of Discriminator Walk ------------------------------------------ The intent of this set of measurements is to characterize how much the Analog card discriminators "walk" as the amplitude of the input pulse is increased. For this measurement a fast negative step signal is sent to the Analog card SHV input connector. Input signal: negative step of duration about 500 nsec edge speed about 2 nsec repetition rate about 100 Hz the step amplitude is controlled by the pulse generator output amplitude and by a set of 50 Ohm attenuators located next to the Analog card SHV input connector an attenuation of 20 and conversion from a 50 Ohm system to a 75 Ohm system was done right next to the SHV input connector Discriminator Output Test Points: The output of the Analog card discriminators were measured on the Digital card right after the discriminator signals were received by the MC10115 differential ECL line receiver chips on the Digital card. This is a nice convenient single ended place to measure these signals and it measures them at the point where they begin the generation of the Digital card's TDC output signal. Data: In the numbers shown below I have removed the timing skew due to the difference in path length for the various inputs to the scope. I.E. the times shown represent the actual delay between the 50% point on the Voltage step at the Analog card SHV input connector and the 50% point at the Digital card MC10115 line receiver chip output pin. The step amplitude values should be good to within a few percent. My "guess" as to the minimum step amplitude that was required to fire the discriminator is based on when it looked like it was firing on about 1/2 of the pulses. As you would expect from the circuit design, the actual delay of the discriminator out, when the pulse is right at the discriminator threshold value, varied over a very wide range. The Analog card High and Low Threshold test points were adjusted for 80 mV and 30 mV before these measurements were made. These adjustments were within a mV or so of these values before I adjusted them. This test was done on the channel that is labeled on the Analog card as channel 15 and is labeled on the Digital card as channel 16. On the Digital card pin 15 of chip U?? is the received Low Threshold discriminator signal and pin 14 of that chip is the received High Threshold discriminator signal. In the table below the "width" number mean how wide of a time range did the "firing edge" of the discriminator output vary over, i.e. how much uncertainty was there in when the discriminator fired. As expected, when you are just above the threshold, there is a lot of uncertainty in when the discriminator fires. Delay to the Delay to the Step Low Threshold High Threshold Amplitude Discriminator Output Discriminator Output --------- -------------------- -------------------- 0.75 mV sometimes fires does not fire after about 200 nsec 1.02 mV about 92 nsec delay does not fire width about 10 nsec 1.29 mV 64 nsec delay does not fire about 5 nsec width 2.49 mV 33 nsec delay does not fire 1 or 2 nsec wide 4.97 mV 22 nsec delay does not fire 1 nsec wide 12.2 mV 15 nsec delay does not fire 12.6 mV 15.3 nsec delay sometimes fires after about 200 nsec 14.9 mV 14.6 nsec delay about 128 nsec delay width about 4 nsec 24.4 mV 13.0 nsec delay 59.3 nsec delay 1 nsec width 49.7 mV 11.4 nsec delay 30.4 nsec delay 99.5 mV 10.0 nsec delay 16.0 nsec delay 203 mV 10.0 nsec delay 14.6 nsec delay 26-Nov-2007 ----------- To verify that the RC time constant between the input amplifiers and the comparators was responsible for most of the "Discriminator Walk" noted above, one channel on the Analog Card was modified to have RC time constants that are about 1/5 of the standard channels. The Low threshold RC components in a standard channel are 1210 Ohm and 47 pFd = 57 nsec. In the modified channel this was changed to 1210 Ohm and 10 pFd = 12 nsec. The High threshold RC components in a standard channel are 680 Ohm and 100 pFd = 68 nsec. In the modified channel this was changed to 680 Ohm and 20 pFd = 14 nsec. Changing the RC time constants to these values (i.e. about 1/5 of their normal value) is a big enough change so that it should be easy to see the effect of this change on the scope while still keeping a significant RC network between the amplifiers and discriminators. Order of magnitude, in the channel with the shorter time constants, there should now be about 4 times the bandwidth reaching the discriminators and thus (assuming flat noise) about twice the noise reaching the discriminators. The test setup for making scope pictures of a "normal" channel and of the "low RC time constant" channel is much the same as described above. As above the scope is connected to the discriminator output signals right where they are received by the MC10115 chips on the Digital Card. The scope probes are connected to the output pins on the MC10115s. In all 6 of the scope pictures the trace colors are the same: Green is the input signal to the Analog Card before the attenuators that bring the pulser output down to the mVolt level. Blue is the output of the Low threshold discriminator. Yellow is the output of the Hi threshold discriminator. The following two scope pictures were made with an input signals that is just above the Hi threshold, i.e. it is about the smallest input signal that you can have and still get a full 4 edge event. Recall that these scope traces are the outputs from the discriminators, and not the outputs after the processing on the digital card. 13_mV_low_time_constant_ch_100_nsec.tif 13_mV_standard_channel_100_nsec.tif The following two scope pictures show the leading edge of the discriminator output signals. Again the input signal is just comfortably above the Hi threshold. 16_mV_low_time_constant_ch_20_nsec.tif 16_mV_standard_channel_20_nsec.tif The following two scope pictures show the discriminator walk from an input signal that is twice as big. 32_mV_low_time_constant_ch_20_nsec.tif 32_mV_standard_channel_20_nsec.tif 20-MAR-2008 ----------- I modified Analog card SN 014 so that it has smaller values of "integrating" capacitors. Channels 0:7 (the channels nearer the top of the card) were modified so that they have "integrating" capacitors of about 1/2 of the stock value. For channels 0:7 The Low Threshold integrating capacitors, C1 and C2, were changed from 47 pFd to 22 pFd The High Threshold integrating capacitors, C10 and C11, were changed from 100 pFd to 47 pFd Channels 8:15 (the channels nearer the bottom of the card) were modified so that they have "integrating" capacitors of about 1/5 of the stock value. For channels 8:15 The Low Threshold integrating capacitors, C1 and C2, were changed from 47 pFd to 10 pFd The High Threshold integrating capacitors, C10 and C11, were changed from 100 pFd to 22 pFd