Plasma Etcher PX-250 Dan's Notes ------------------------------------ Original Rev. 7-Sept-2021 Current Rev. 22-Sept-2021 The general problem with the March PX-250 Plasma Etcher is that the unit turns Off or stops the etch cycle after about 2 minutes when it should keep on running. The unit is used in Manual Mode where the user should need to manually stop the cycle. The unit has always done this since it was purchased. March offered no solution for this problem. We have the following schematics: - an overall schematic of the unit pg 88 - the Interface board pg 89 - the Display Keyboard pg 90 - the RF Phase Magnitude board pg 91 - the RF Tuning Controller board pg 92 - the RF Tuning Network Motor Filter pg 93 We do not have schematics for: - the Computer board - the DC Power Supply - the Solenoid Driver board - the MFC Mass Flow Controllers - the RF Generator - the Baratron - the optional Pressure Controller MFC Based on the schematic of the Interface board the Computer board is probably based on a Z-80 or 8051 type of processor. ADC Section: ------------ The Interface board uses an ICL7109CPL 12 bit ADC that is fronted by a TL072CP buffer and two 8 input analog multiplexers MUX08FP. The Enable pin on the MUX08s is High active. The inputs to the multiplexers are: Mux Connection Mux Adrs Name - Function IF Brd System Input 3210 ----------------- ------------------ ------- ---- DCBIAS End-Point P5-7 Photocell U17-S1 LLLL TEMP 10k to Gnd P5-22 NC U17-S2 LLLH MFC1FL Gas1 Read P2-14 MFC1-2 Flow U17-S3 LLHL MFC2FL Gas2 Read P2-23 MFC2-2 Flow U17-S4 LLHH MFC3FL Gas3 Read P2-9 MFC3-2 Flow U17-S5 LHLL MFC4FL Gas4 Read P2-22 MFC4-2 Flow U17-S6 LHLH 5VREF DAC 5V Ref U3A-1 U17-S7 LHHL Gnd Gnd U17-S8 LHHH Baratron R20 10k P3-2 Baratron-3 U16-S1 HLLL MFC5FL Float P5-14 NC U16-S2 HLLH MFC6FL Float P5-23 NC U16-S3 HLHL PHASE Float P5-9 NC U16-S4 HLHH MAG Float P5-21 NC U16-S5 HHLL FWDPWR RF Gen P5-20 RF_Gen-3 U16-S6 HHLH REFLPWR RF Gen P5-8 RF_GEN-6 U16-S7 HHHL REFERENCE 1.024V CR1 R8 ADC Ref U16-S8 HHHH Note tha the DCBIAS End-Point multiplexer input includes a 10k Ohm pull-down to Ground on the Interface Board. Note the 4 floating input to MUX08 U16. The four address lines that control the two Mux chips are sourced by the B Port of the Z80-PIO chip - specifically: Z80-PIO Mux Signal Pin Adrs Line ----------- --------- PB0 27 MUX0 PB1 28 MUX1 PB2 29 MUX2 PB3 30 MUX3 The RUN/HOLD_bar signal to the ADC also comes from the B Port of the Z80-PIO chip - specifically: PB4 pin 31 The STATUS signal from the ADC goes to the A Port of Z80-PIO chip - specifically: PA0 pin 15 The low active LBEN and HBEN byte select signals to the ADC come from a 74HC138 decoder - specifically: with the Z80 /RD and /IORQ both asserted low, then the decoder is enabled and the Z80 Address Bus: Used By the Not U14 DeCoder DeCoded ------------------ -------------- A7 A6 A5 A4 A3 A2 A1 A0 Asserts Reads --- --- --- --- -- -- -- -- ------- ------------ Hi Low Low Low x x x x LBEN ADC Low Byte Hi Low Low Hi x x x x HBEN ADC Hi Byte The Voltage Reference to the ADC is +1.024 Volts and is connected to RIN+ with RIN- grounded. The input signal to the ADC has the range 0 to +2.048 and comes from the voltage follower buffer op-amp U3B. The output of this op-amp buffer is scaled by R3 & R16 before going to the ADC input. The R3 trim pot is probably set to scale a 0 to +10V signal to go to the ADC. The ADC is powered by + and - 5V and Gnd but note that the op-amp that drives its INH is powered by +-15V. INL is tied to Gnd. The OIN aka Oscillator Input signal to the ADC comes from Q6 (or Q5) of a 74HC4040 counter. The clock to this counter appears to the the Z80 clock which is probably about 4 MHz thus giving a 62.5 kHz clock to the ADC which requires 8192 clock per conversion which results in about 7.5 conversions per second. Q12 of this 74HC4040 counter is a signal called TICKER which must run at about 977 Hz and goes to PB7 of the Z80-PIO which is strange because the rest of the PIO's B Port is outputs. The 12 output signals from the ADC and its Polarity and OverRange go directly to the Z80 Data Bus. Z80-PIO Port Signals: --------------------- Z80-PIO Port Pin Dir Net Name Function ----------------- -------- ----------------------- PA0 15 In STATUS STATUS signal from ADC PA1 14 --- --- NC but has a 10K Pull Up PA2 13 --- --- NC but has a 10K Pull Up PA3 12 --- --- NC but has a 10K Pull Up PA4 10 --- --- NC but has a 10K Pull Up PA5 9 --- --- NC but has a 10K Pull Up PA6 8 --- --- NC but has a 10K Pull Up PA7 7 Out RFENA has a 10k Pull Up and is part of Enabling the RF Generator Must be Low to Enable RF Gen. ARDY 18 Out --- NC ASTRB 16 In --- NC but pulled hard to Vcc +5V PB0 27 Out MUX0 Mux Adrs 0 to Analog Muxs PB1 28 Out MUX1 Mux Adrs 1 to Analog Muxs PB2 29 Out MUX2 Mux Adrs 2 to Analog Muxs PB3 30 Out MUX3 Mux Adrs 3 Sel U16 or U17 Mux PB4 31 Out RUN/HOLD Run/Hold Control to ADC PB5 32 --- --- NC but has a 10K Pull Up PB6 33 --- --- NC but has a 10K Pull Up PB7 34 In TICKER Clk from 74HC4040 Q12 977 Hz BRDY 21 Out --- NC BSTRB 17 In --- NC but pulled hard to Vcc +5V The PIO's C/D select pin is Z80 Adrs A0 Control or Data The PIO's A/B select pin is Z80 Adrs A1 A Port or B Port Interface Board Connections to the Computer Board: -------------------------------------------------- There are 34 pins total between the Interface Brd and Computer Brd. 4x Grounds 2x Vcc +5V 8x Data Lines 8x Address Lines 5 /RD, /WR, /RST, /RST+M1, /IORQ, 4 CLK, /PIO, /INT, IEI 3x NC 74HC138 Address Decoders: ------------------------- The Interface Brd has two 74HC138 3 to 8 decoders, U14 decodes Read Adrs and U15 decodes Write Adrs. Both of these decoders have four of their inputs the same: A is A4, B is A5, C is A6, G1 is A7, /G2A is /IORQ The Read decoder U14 has its /G2B tied to /RD. The Write decoder U15 has its /G2B tied to /WR. So this setup decodes in the following way: G1 C B A A7 A6 A5 A4 Read Decoder Write Decoder -- -- -- -- -------------- -------------------------------- 1 0 0 0 ADC Low Byte LATCH0 S0:S8 1 0 0 1 ADC High Byte LATCH1 S9:S15, /RFON 1 0 1 0 --- --- 1 0 1 1 --- --- 1 1 0 0 --- DAC0 MFC_1:4_SP 1 1 0 1 --- DAC1 MFC_5:6_SP, RFSP, IND.PRESS. 1 1 1 0 --- --- 1 1 1 1 --- --- Again disorganized mindless stupidity: /RFON is the highest bit in LATCH1 but the next to highest in DAC1. DACs 2x Quad: -------------- The two QUAD DACs are PMI PM-7226. They run on +15V and -5V with a +5V Reference. The Voltage Output from these DACs will be 0V to +5V. The A0, A1 DAC Select Inputs to these chips are the Adrs Bus A0, A1 lines. So the Address to talk to these DAC are: Not Decoder U15 DeCo- DAC ----------- ded Sel G1 C B A ----- ----- A7 A6 A5 A4 A3 A2 A1 A0 Selected DAC Controlled Target -- -- -- -- -- -- -- -- ------------ --------------------- 1 1 0 0 x x 0 0 DAC0, DAC-A P2-26 MFC1 Set Point 1 1 0 0 x x 0 1 DAC0, DAC-B P2-12 MFC2 Set Point 1 1 0 0 x x 1 0 DAC0, DAC-C P2-21 MFC3 Set Point 1 1 0 0 x x 1 1 DAC0, DAC-D P2-7 MFC4 Set Point 1 1 0 1 x x 0 0 DAC1, DAC-A P5-26 MFC5 Set Point 1 1 0 1 x x 0 1 DAC1, DAC-B P5-12 MFC6 Set Point 1 1 0 1 x x 1 0 DAC1, DAC-C P5-5 RF Power Set Pt 1 1 0 1 x x 1 1 DAC1, DAC-D P5-3 Optional Pressure Controller Set Pt Solenoid Lines 15x +1 : ----------------------- This setup uses two 74HC259 addressable octal latch to hold the data written by the cpu. This strange setup uses the A0 Address Line as the Data input to each latch. Thus doing a write cycle to an even address loads a Zero into the latch at that address and writing to the next higher odd address loads a One into that latch. The value on the Data Bus is not used during these write cycles. 15 or the 16 signals from the two 74HC259s are then current boosted and inverted by two octal ULN2803A darlington drivers. All data in the two 74HC259s is cleared to zero when the /RST line is asserted. The addressing setup and the connections from the Interface board out into the system are the following: Decoder U15 Latch Da Solenoid ----------- Select ta Line & G1 C B A -------- -- U8 Drlngtn A7 A6 A5 A4 A3 A2 A1 A0 Output Controlled Target -- -- -- -- -- -- -- -- -------- ------------------------ 1 0 0 0 0 0 0 0 S1 High P2-20 GAS1 Close Sol 1 1 0 0 0 0 0 0 1 S1 Low P2-20 GAS1 Open Sol 1 1 0 0 0 0 0 1 0 S2 High P2-5 GAS2 Close Sol 2 1 0 0 0 0 0 1 1 S2 Low P2-5 GAS2 Open Sol 2 1 0 0 0 0 1 0 0 S3 High P2-17 GAS3 Close Sol 3 1 0 0 0 0 1 0 1 S3 Low P2-17 GAS3 Open Sol 3 1 0 0 0 0 1 1 0 S4 High P2-6 GAS4 Close Sol 4 1 0 0 0 0 1 1 1 S4 Low P2-6 GAS4 Open Sol 4 1 0 0 0 1 0 0 0 S5 High P2-18 BLEED Opn/Cls ? 1 0 0 0 1 0 0 1 S5 Low P2-18 BLEED Opn/Cls ? 1 0 0 0 1 0 1 0 S6 High P2-3 VAC Close VAC Valve 1 0 0 0 1 0 1 1 S6 Low P2-3 VAC Open VAC Valve 1 0 0 0 1 1 0 0 S7 High P2-15 PRESS Close PRESS 1 0 0 0 1 1 0 1 S7 Low P2-15 PRESS Open PRESS 1 0 0 0 1 1 1 0 S8 High P2-4 No System Connection 1 0 0 0 1 1 1 1 S8 Low P2-4 No System Connection Note that S5 controls the Bleed valve via the Solenoid Driver Brd. This valve has a 120 VAC coil. I can not guess the Hi Low vs Open Close polarity. Decoder U15 Latch Da Solenoid ----------- Select ta Line & G1 C B A -------- -- U8 Drlngtn A7 A6 A5 A4 A3 A2 A1 A0 Output Controlled Target -- -- -- -- -- -- -- -- -------- ------------------------ 1 0 0 1 0 0 0 0 S9 High P3-8 Close Baratron 1 0 0 1 0 0 0 1 S9 Low P3-8 Open Isolation 1 0 0 1 0 0 1 0 S10 High P3-7 No System Connection 1 0 0 1 0 0 1 1 S10 Low P3-7 No System Connection 1 0 0 1 0 1 0 0 S11 High P5-4 ?? Not Used ?? 1 0 0 1 0 1 0 1 S11 Low P5-4 ?? Not Used ?? 1 0 0 1 0 1 1 0 S12 High P5-16 No System Connection 1 0 0 1 0 1 1 1 S12 Low P5-16 No System Connection 1 0 0 1 1 0 0 0 S13 High P5-1 RF Generator Pin 10 1 0 0 1 1 0 0 1 S13 Low P5-1 RF Generator Pin 10 1 0 0 1 1 0 1 0 S14 High P5-13 Audio Alarm Off 1 0 0 1 1 0 1 1 S14 Low P5-13 Audio Alarm On 1 0 0 1 1 1 0 0 S15 High P5-2 Audio Alarm Off 1 0 0 1 1 1 0 1 S15 Low P5-2 Audio Alarm On 1 0 0 1 1 1 1 0 RFON High See the RF Generator 1 0 0 1 1 1 1 1 RFON Low On/Off details below Note that either S14 or S15 can turn On the Audio Alarm. Either going Low will turn On the Audio Alarm. In theory one signal is called Abort_Alarm and the other is called E_of_P (End of Program ?) Alarm, but their pin numbering does not match on the System and Interface Brd schematics. Note I believe that the RF Generator is Turned On when the signal RF_ON on P5-6 is pulled Low by the contacts closing on relay K1. For K1 to close the following 2 conditions must be meet: - the U6 74HC259 Q7 signal called RFON in the table just above must be High - the PIO PA7 signal RFENA which is pulled up by a 10k must be Low RF Generator Control Connector Pinout: -------------------------------------- Control connections to the RF Generator shown in the System schematic for the PX-250: Pin Signal Num Name Connector Net and Destination --- --------- --------------------------------------------- 1 RF On P5-6 RF_ON Relay K1 Contacts to Gnd 2 GND P5-10 GND to GND on the IF Brd 3 RF Set Pt P5-5 RF Set Pt DAC1 Out-C 4 FWD PWR P5-20 FWD PWR Analog Multiplexer U16 --> ADC 5 GND P5-11 GND to GND on the IF Brd 6 REFL PWR P5-8 RFL PWR Analog Multiplexer U16 --> ADC 7 GND P5-19 GND to GND on the IF Brd 8 --- P5-25 --- No Connection on the IF Brd 10 --- P5-1 SOL_13 S13 from U9 ULN2803A driver 15 GND wired to Gnd/Rtn pin 5 on the DC Power Supply DC Power Supply Connector: -------------------------- Pin Num Signal and Destination --- ---------------------------------------------------- 1 Vcc +5V to the Interface Brd P4-4 2 Vcc +5V to the Display Brd P2-2 3 not shown on schematic 4 Gnd/Rtn to the Interface Brd P4-2 and Display Brd P2-5 5 Gnd/Rtn to Solenoid Driver Brd pin 3, RF Gen Conn pin 15 6 +15 Volt to Interface Brd P4-1, MFC1:MFC4, SOL_1:SOL_4, Solenoid Driver Brd pin 4, Optional Pressure Controller pin pin 7, Tuner Controller pin 2, End-Point PhototCell 7 not shown on schematic 8 -15 Volt to Interface Brd P4-3, MFC1:MFC4, Optional Pressure Controller pin pin 6, Tuner Controller pin 1 Mass Flow Controller Connector: ------------------------------- Pin Signal Num Name Connector Net and Destination --- --------- --------------------------------------------- 1 Not shown on the System schematic 2 FLOW to Analog Mux U17 Gas then to ADC Flow Read 3 SET POINT to DAC0 Output A,B,C,D via P2 4 GND to Interface Brd GND via P4 5 Not shown on the System schematic 6 -15 Volt to the DC Supply 7 -15 Volt to the DC Supply 8 GND to Interface Brd GND via P2 9 GND to Interface Brd GND via P2 List of all Parameters that the Controller can Read via the Interface Board: ------------------------------------------ Analog Quantities Read via the ADC as 12 bit values: Name Item Read --------- -------------------------- DCBIAS End-Point Photocell TEMP 10k to Gnd MFC1FL Mass Flow Controller 1 Gas1 Flow Rate MFC2FL Mass Flow Controller 2 Gas2 Flow Rate MFC3FL Mass Flow Controller 3 Gas3 Flow Rate MFC4FL Mass Flow Controller 4 Gas4 Flow Rate 5VREF DAC 5V Reference Gnd Ground point on the Interface Brd Baratron Chamber Pressure measured by Baratron FWDPWR Forward Power as measured by the RF Generator REFLPWR Reflected Power as measured by the RF Generator REFERENCE 1.024V Reference for ADC and 5V Ref. Single Bit Digital Items Read by a Status Register: Z80-PIO Name Function Input Port ------ ----------------------------- ---------- STATUS STATUS signal from ADC PA0 TICKER Clk from 74HC4040 Q12 977 Hz PB7 List of all Parameters that the Controller can Set via the Interface Board: ------------------------------------------ Analog Parameters set via 8 bit DAC Voltage Outputs: Parameter Name and Function ------------------------------------------------------------- MFC1 Set Point Gas 1 Flow Rate Set Point MFC2 Set Point Gas 2 Flow Rate Set Point MFC3 Set Point Gas 3 Flow Rate Set Point MFC4 Set Point Gas 4 Flow Rate Set Point RF Power Set Point Power Level Control Signal to the RF Generator Optional Pressure Controller Set Point Single Bit Digital Items Set via Control Registers: Control Address ------------- A A A A A A A 7 6 5 4 3 2 1 Name Function - - - - - - - ------ ------------------------------- 1 0 0 0 0 0 0 S1 Open/Close Gas 1 Solenoid Valve 1 0 0 0 0 0 1 S2 Open/Close Gas 2 Solenoid Valve 1 0 0 0 0 1 0 S3 Open/Close Gas 3 Solenoid Valve 1 0 0 0 0 1 1 S4 Open/Close Gas 4 Solenoid Valve 1 0 0 0 1 0 0 S5 Open/Close Purge/Bleed Solenoid Valve 1 0 0 0 1 0 1 S6 Open/Close Vaccume Pump Solenoid Valve 1 0 0 0 1 1 0 S7 Open/Close Opt Pressure MFC Solenoid Valve 1 0 0 1 0 0 0 S9 Open/Close Baratron Solenoid Valve 1 0 0 1 1 0 0 S13 Runs to RF Gen pin 10 - no or unknown function 1 0 0 1 1 0 1 S14 Audio Alarm On/Off End of Program or Abort ? 1 0 0 1 1 1 0 S15 Audio Alarm On/Off End of Program or Abort ? 1 0 0 1 1 1 1 RFON RF Generator On/Off one of two control signals required to Enable the RF Generator Z80-PIO Name Function Output Port -------- -------------------------------- ----------- RFENA One of two signals Required PA7 to Enable the RF Generator MUX0 Analog Mux Adrs 0 to Analog Muxs PB0 MUX1 Analog Mux Adrs 1 to Analog Muxs PB1 MUX2 Analog Mux Adrs 2 to Analog Muxs PB2 MUX3 Analog Mux Adrs 3 Sel U16 or U17 PB3 RUN/HOLD Run/Hold Control to ADC PB4 Obvious Design Stupidities: --------------------------- - They have done nothing to avoid decoder glitches during Write cycles, i.e. clobbering target foo when writing to target bla. - They have "Write Only" I/O to the devices they are trying to control, i.e. they can not verify the data values they think they have written - very amateurish. - They have un-needed holes in their Address Map - They have allowed duplicate Address to select the same device. - They have not used a uniform layout of controlled objects within a given Address Target. - They used a PIO for some of the control signals and the strange awkward 74HC259 for other control signals. Why not keep it simple and uniform ? - Their Inteface Brd schematic uses unmatched bus rippers. I can only assume that e.g. S1 matches SOL1_GAS1. - The Netnames of the Abort and E_of_P pins on P5 are criss-crossed between the System schematic and the Interface Brd schematic. - Analog sins: they drive the ADC which is powered from 5V buses with a buffer that is powered from 15V buses, they have open floating inputs to the analog multiplexer. - They have no series resistors to control the base current in the MPQ2907 drivers on their Display board. Work in Clean Room with Baokang 14-Sept-2021: ---------------------------------------------- The problem is that the Plasma Etcher, running in Manual Mode, will only run for about 180 to 200 seconds. When the Plasma Etcher was new one could run for 10 minutes without the etcher shuting down. - After running with RF On for about 180 to 200 seconds: the RF is turned Off by the Controller, the Gas Flow, Vacuum, and Baratron all remain On, and the KeyBoard is locked up except for the Stop button. - Can do the above 2 or 3 times in a row and it always runs for about 180 to 200 seconds and then it stops with all the symptoms listed above. So the problem is not something heating up. - Does the same thing with manual or automatic RF Tuning. - Does the same thing at the 100 or 300 Watt power level. - Does the same thing with the RF Generator turned Off. So the problem has to be with the Controller - its the only thing that can turn Off the RF and lock up the KeyBoard except for the Stop button. While in the Clean Room looked at the Controller Board: - Only silkscreen label is, "D.R. FORTH REV. A 1996". - Has an 8 MHz crystal (but I think the CPU is 4 MHz). - Zilog Z84C0006PEC Z80 CPU U13 ? - Zilog Z0843004PSC Z80 CTC U3 Z84C4008PEC Z80 SIO/O U15 - MOSTEK MK3881N-4 Z80 PIO U4, U5 - CMOS Static RAM 8kx8 Hitachi HM6264P-12 U2 - open memory socket U7 - UV PROM TI TMS 2764-25JL "NEW DOOR" U8 .R28 - UV PROM AMD AM2764DC "NEW DOOR" U9 R28 - EEPROM 2kx8 Microchip 28C16A-20/P U10 - UV PROM AMD AM2764DC "NEW DOOR" U11 .R28 - UV PROM ?? "D.R. FORTH" U12 ? REV. 3.6 - 74HCT??? U1, U21 ??? - MC1489 U6, LF347 quad jfet opamp U14 - 74HCT04 U16 ?, 74HC393 U17, 74HCT138 U18 - 74HC11 U19, 74HCT04 U20, 74HC132 U22, 74HC74 U23 - LMC7660IN U24 - I see no battery backup type setup.