PROM #1 in the  i-Source  Digital Controller

                   Timing Specification File

        Timing Specification File Revision:  14-MAY-1993

            PROM Timing Waveform Serial Number:  1A










All numeric data in all Timing Specification Files is in decimal.






     PROM
    Data Bit                       Function
   ----------   ------------------------------------------------------------
       0.         DAC Code Counter Clock
       1.         Shift Register  Shift/Load
       2.         Shift Register  Serial Shift Clock
       3.         DAC Clock
       4.         DAC Latch Enable
       5.         End Train
       6.         Not yet assigned.
       7.         Not yet assigned.






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Beginning_of_Data_Section


; DAC Code Counter Clock                       PROM Data Bit 0
; Pulse High once for one tick near the beginning of the train.

Channel #1,  Down_At 0, Up_At 2, Down_At 3     ;



; Shift Register  Shift/Load                  PROM Data Bit 1
; Pulse Low once for one tick near the beginning of the train.

Channel #2,  Up_At 0, Down_At 5, Up_At 6       ;



; Shift Register  Serial Shift Clock       PROM Data Bit 2
; Pulse High 17 times during the train.

Channel #3,  Down_At 0,  Up_At  8, Down_At  9, Up_At 10, Down_At 11    ;
Channel #3,              Up_At 12, Down_At 13, Up_At 14, Down_At 15    ;
Channel #3,              Up_At 16, Down_At 17, Up_At 18, Down_At 19    ;
Channel #3,              Up_At 20, Down_At 21, Up_At 22, Down_At 23    ;
Channel #3,              Up_At 24, Down_At 25, Up_At 26, Down_At 27    ;
Channel #3,              Up_At 28, Down_At 29, Up_At 30, Down_At 31    ;
Channel #3,              Up_At 32, Down_At 33, Up_At 34, Down_At 35    ;
Channel #3,              Up_At 36, Down_At 37, Up_At 38, Down_At 39    ;
Channel #3,              Up_At 40, Down_At 41



; DAC Clock            PROM Data Bit 3
; Pulse High 19 times during the train.

Channel #4,  Down_At 0,  Up_At  7, Down_At  8, Up_At  9, Down_At 10    ;
Channel #4,              Up_At 11, Down_At 12, Up_At 13, Down_At 14    ;
Channel #4,              Up_At 15, Down_At 16, Up_At 17, Down_At 18    ;
Channel #4,              Up_At 19, Down_At 20, Up_At 21, Down_At 22    ;
Channel #4,              Up_At 23, Down_At 24, Up_At 25, Down_At 26    ;
Channel #4,              Up_At 27, Down_At 28, Up_At 29, Down_At 30    ;
Channel #4,              Up_At 31, Down_At 32, Up_At 33, Down_At 34    ;
Channel #4,              Up_At 35, Down_At 36, Up_At 37, Down_At 38    ;
Channel #4,              Up_At 39, Down_At 40, Up_At 41, Down_At 42    ;
Channel #4,              Up_At 44, Down_At 45



; DAC Latch Enable                    PROM Data Bit 4
; Go High for 39 ticks during the middle of the train.

Channel #5,  Down_At 0, Up_At 4, Down_At 43



; End-Train                        PROM Data Bit 5
; Pulse High once for one tick at the end of train.

Channel #6,  Down_At 0, Up_At 46, Down_At 47




; Not Yet Assigned         PROM Data Bit 6

Channel #7,  Down_At 0


; Not Yet Assigned         PROM Data Bit 7

Channel #8,  Down_At 0




End_of_Data_Section