#------------------------------------------------------------------------
# ThisCommandFile = 'DAQ96_Collect_ArmAllAdfs.cmd'
#
#  Called by DAQ96_Collect_Main.cmd to arm all ADFs and be ready 
#  to capture the next event
#
# Created  19-Jan-2007
#
#------------------------------------------------------------------------

from Site_Dependent             import  AdfCardTot
from Site_Dependent             import  AdfSlotVsCardNum
from Site_Dependent             import  AdfSlotMaestro
from Site_Dependent             import  SamplesPerChannel

#------------------------------------------------------------------------

# Register Address and data for controlling the NIM Trigger (i.e. Crate_0_Signal_0)
RegAddr_MaestroToSCLD       = 1

# Control Data to tell the SCLD to enable/disable the NIM Trigger
Data_Enable_NIM_Trigger     = 0xff50 
Data_Disable_NIM_Trigger    = 0xff40



# Register Address for Raw ADC Address Generator Control Register
RegAddr_RawAdcAddrGen_Ctrl  = 512

#------------------------------------------------------------------------
#------------------------------------------------------------------------

# Disable the External NIM Trigger on the SCLD card.
# The External NIM Trigger is DISABLED by telling the Maestro ADF-2
# card,  i.e. ADF-2 Card Number #0,  to send a NOT asserted
# ADF_Crate_to_SCLD_Signal_0   signal to the SCLD card.  Do this
# by writing to the Board Control PAL Register Address 1.

Rio_Write    ( SlotNum    = AdfSlotMaestro,
               ChipNum    = 0, # i.e. Board Control PAL
               RegAddr    = RegAddr_MaestroToSCLD,
               DataOut    = Data_Disable_NIM_Trigger )




# Restart the Address Generators on **ALL** ADF-2 cards 
# so that Raw ADC data is being written into the Raw ADC Monitor 
# Data Block circular buffers.

# Control Data for the Raw ADC address generator control register to :
#  - enable multi turn running
#  - enable the Global Write Enable signal to be asserted
#  - enable the Save Monitor Data signal to stop the Address Generators
Data_ModeCaptureMonitorData = 0x000e

# Control Data bit for the Raw ADC address generator control register to 
# Start the Address Generator
Mask_StartAddressGenerator  = 0x0001

for AdfNum in range(AdfCardTot) :

    for FpgaNum in range(2) :

        # start address generator (i.e. pulse one bit high)
        Rio_Write    ( SlotNum    = AdfSlotVsCardNum[AdfNum],
                       ChipNum    = FpgaNum,
                       RegAddr    = RegAddr_RawAdcAddrGen_Ctrl,
                       DataOut    = Data_ModeCaptureMonitorData + Mask_StartAddressGenerator )

        Rio_Write    ( SlotNum    = AdfSlotVsCardNum[AdfNum],
                       ChipNum    = FpgaNum,
                       RegAddr    = RegAddr_RawAdcAddrGen_Ctrl,
                       DataOut    = Data_ModeCaptureMonitorData )


# At this point there is a >500 usec delay to make certain that all
# of the circular buffers have completely filled with fresh data
# before allowing the possibility of a trigger.

time.sleep (0.001)


# "arm" the trigger, i.e. the system will now respond to the next occurrence 
# of the External NIM Trigger Signal.

Rio_Write    ( SlotNum    = AdfSlotMaestro,
               ChipNum    = 0, # i.e. Board Control PAL
               RegAddr    = RegAddr_MaestroToSCLD,
               DataOut    = Data_Enable_NIM_Trigger )