CMX
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Behavioral Architecture Reference

Processes

PROCESS_0  ( clk_40 )

Components

vme_local_switch  <Entity vme_local_switch>
vme_inreg_notri_async  <Entity vme_inreg_notri_async>
vme_outreg_notri_async  <Entity vme_outreg_notri_async>

Signals

BCID_next  unsigned ( 11 downto 0 )
BCID_reg  unsigned ( 11 downto 0 )
BCID_reset_val  unsigned ( 11 downto 0 )
data_vme_out_local  arr_16 ( 2 downto 0 )
bus_drive_local  std_logic_vector ( 2 downto 0 )
data_from_vme_REG_RW_BCID_RESET_VAL  std_logic_vector ( 15 downto 0 )
data_to_vme_REG_RW_BCID_RESET_VAL  std_logic_vector ( 15 downto 0 )
data_from_vme_REG_RW_BC_RESET_ERROR_COUNTER_RESET  std_logic_vector ( 15 downto 0 )
data_to_vme_REG_RW_BC_RESET_ERROR_COUNTER_RESET  std_logic_vector ( 15 downto 0 )
bc_reset_error_counter  unsigned ( 15 downto 0 )
error_counter_reset  std_logic

Instantiations

vme_local_switch_inst  vme_local_switch <Entity vme_local_switch>
vme_inreg_async_reg_rw_bcid_reset_val  vme_inreg_notri_async <Entity vme_inreg_notri_async>
vme_outreg_notri_async_reg_ro_bc_reset_error_counter  vme_outreg_notri_async <Entity vme_outreg_notri_async>
vme_inreg_async_reg_rw_bc_reset_error_counter_reset  vme_inreg_notri_async <Entity vme_inreg_notri_async>

Detailed Description

Definition at line 44 of file BCID_counter.vhd.

Member Function Documentation

PROCESS_0 (   clk_40 )

Definition at line 166 of file BCID_counter.vhd.

Member Data Documentation

bc_reset_error_counter unsigned ( 15 downto 0 )
Signal

Definition at line 97 of file BCID_counter.vhd.

BCID_next unsigned ( 11 downto 0 )
Signal

Definition at line 45 of file BCID_counter.vhd.

BCID_reg unsigned ( 11 downto 0 )
Signal

Definition at line 46 of file BCID_counter.vhd.

BCID_reset_val unsigned ( 11 downto 0 )
Signal

Definition at line 47 of file BCID_counter.vhd.

bus_drive_local std_logic_vector ( 2 downto 0 )
Signal

Definition at line 88 of file BCID_counter.vhd.

data_from_vme_REG_RW_BC_RESET_ERROR_COUNTER_RESET std_logic_vector ( 15 downto 0 )
Signal

Definition at line 93 of file BCID_counter.vhd.

data_from_vme_REG_RW_BCID_RESET_VAL std_logic_vector ( 15 downto 0 )
Signal

Definition at line 90 of file BCID_counter.vhd.

data_to_vme_REG_RW_BC_RESET_ERROR_COUNTER_RESET std_logic_vector ( 15 downto 0 )
Signal

Definition at line 94 of file BCID_counter.vhd.

data_to_vme_REG_RW_BCID_RESET_VAL std_logic_vector ( 15 downto 0 )
Signal

Definition at line 91 of file BCID_counter.vhd.

data_vme_out_local arr_16 ( 2 downto 0 )
Signal

Definition at line 87 of file BCID_counter.vhd.

error_counter_reset std_logic
Signal

Definition at line 99 of file BCID_counter.vhd.

vme_inreg_async_reg_rw_bc_reset_error_counter_reset vme_inreg_notri_async
Instantiation

Definition at line 145 of file BCID_counter.vhd.

vme_inreg_async_reg_rw_bcid_reset_val vme_inreg_notri_async
Instantiation

Definition at line 112 of file BCID_counter.vhd.

Definition at line 57 of file BCID_counter.vhd.

vme_local_switch
Component

Definition at line 49 of file BCID_counter.vhd.

vme_local_switch_inst vme_local_switch
Instantiation

Definition at line 104 of file BCID_counter.vhd.

Definition at line 73 of file BCID_counter.vhd.

vme_outreg_notri_async_reg_ro_bc_reset_error_counter vme_outreg_notri_async
Instantiation

Definition at line 131 of file BCID_counter.vhd.


The documentation for this class was generated from the following file: