crate_summing_module Entity Reference

Inheritance diagram for crate_summing_module:

Entities
crate_summing_module	architecture

Libraries
IEEE

Use Clauses
IEEE.STD_LOGIC_UNSIGNED.all
ieee.std_logic_1164.all
ieee.numeric_std.all
work.CMX_flavor_package.all
work.CMXpackage.all
work.CMX_VME_defs.all

Ports
CLK	in std_logic
BACKPLANE_DATA_IN	in energy_array
LOCAL_CABLE_OUT	out std_logic_vector ( 26 * 4 - 1 downto 0 )
BCID_in	in std_logic_vector ( 11 downto 0 )
BCID_delayed	out std_logic_vector ( 11 downto 0 )
par_err_lcl	in T_SL

Detailed Description

Definition at line 14 of file crate_summing_module.vhd.

Member Data Documentation

BACKPLANE_DATA_IN in energy_array

Port

Definition at line 17 of file crate_summing_module.vhd.

BCID_delayed out std_logic_vector ( 11 downto 0 )

Port

Definition at line 20 of file crate_summing_module.vhd.

BCID_in in std_logic_vector ( 11 downto 0 )

Port

Definition at line 19 of file crate_summing_module.vhd.

CLK in std_logic

Port

Definition at line 16 of file crate_summing_module.vhd.

IEEE

Library

Definition at line 6 of file crate_summing_module.vhd.

ieee.numeric_std.all

Package

Definition at line 9 of file crate_summing_module.vhd.

ieee.std_logic_1164.all

Package

Definition at line 8 of file crate_summing_module.vhd.

IEEE.STD_LOGIC_UNSIGNED.all

Package

Definition at line 7 of file crate_summing_module.vhd.

LOCAL_CABLE_OUT out std_logic_vector ( 26 * 4 - 1 downto 0 )

Port

Definition at line 18 of file crate_summing_module.vhd.

par_err_lcl in T_SL

Port

Definition at line 21 of file crate_summing_module.vhd.

work.CMX_flavor_package.all

Package

Definition at line 10 of file crate_summing_module.vhd.

work.CMX_VME_defs.all

Package

Definition at line 12 of file crate_summing_module.vhd.

work.CMXpackage.all

Package

Definition at line 11 of file crate_summing_module.vhd.

---

The documentation for this class was generated from the following file:

• SumET/SumET_common/trunk/sources/crate_summing_module.vhd