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rx_sync Entity Reference
Inheritance diagram for rx_sync:
Topo_Data_TX

Entities

RTL  architecture
 

Libraries

ieee 
UNISIM 

Use Clauses

ieee.std_logic_1164.all 
ieee.numeric_std.all 
UNISIM.VCOMPONENTS.all 

Ports

RXENPMAPHASEALIGN   out std_logic
RXPMASETPHASE   out std_logic
RXDLYALIGNDISABLE   out std_logic
RXDLYALIGNOVERRIDE   out std_logic
RXDLYALIGNRESET   out std_logic
SYNC_DONE   out std_logic
USER_CLK   in std_logic
RESET   in std_logic

Detailed Description

Definition at line 73 of file rx_sync.vhd.

Member Data Documentation

ieee
Library

Definition at line 67 of file rx_sync.vhd.

Definition at line 69 of file rx_sync.vhd.

Definition at line 68 of file rx_sync.vhd.

RESET in std_logic
Port

Definition at line 83 of file rx_sync.vhd.

RXDLYALIGNDISABLE out std_logic
Port

Definition at line 78 of file rx_sync.vhd.

RXDLYALIGNOVERRIDE out std_logic
Port

Definition at line 79 of file rx_sync.vhd.

RXDLYALIGNRESET out std_logic
Port

Definition at line 80 of file rx_sync.vhd.

RXENPMAPHASEALIGN out std_logic
Port

Definition at line 76 of file rx_sync.vhd.

RXPMASETPHASE out std_logic
Port

Definition at line 77 of file rx_sync.vhd.

SYNC_DONE out std_logic
Port

Definition at line 81 of file rx_sync.vhd.

UNISIM
Library

Definition at line 70 of file rx_sync.vhd.

Definition at line 71 of file rx_sync.vhd.

USER_CLK in std_logic
Port

Definition at line 82 of file rx_sync.vhd.


The documentation for this class was generated from the following file: