tx_sync Entity Reference

Inheritance diagram for tx_sync:

Entities
RTL	architecture

Libraries
ieee
UNISIM

Use Clauses
ieee.std_logic_1164.all
ieee.numeric_std.all
UNISIM.VCOMPONENTS.all

Generics
SIM_TXPMASETPHASE_SPEEDUP	integer := 0

Ports
TXENPMAPHASEALIGN	out std_logic
TXPMASETPHASE	out std_logic
TXDLYALIGNDISABLE	out std_logic
TXDLYALIGNRESET	out std_logic
SYNC_DONE	out std_logic
USER_CLK	in std_logic
RESET	in std_logic

Detailed Description

Definition at line 72 of file tx_sync.vhd.

Member Data Documentation

ieee

Library

Definition at line 66 of file tx_sync.vhd.

ieee.numeric_std.all

Package

Definition at line 68 of file tx_sync.vhd.

ieee.std_logic_1164.all

Package

Definition at line 67 of file tx_sync.vhd.

RESET in std_logic

Port

Definition at line 85 of file tx_sync.vhd.

SIM_TXPMASETPHASE_SPEEDUP integer := 0

Generic

Definition at line 75 of file tx_sync.vhd.

SYNC_DONE out std_logic

Port

Definition at line 83 of file tx_sync.vhd.

TXDLYALIGNDISABLE out std_logic

Port

Definition at line 81 of file tx_sync.vhd.

TXDLYALIGNRESET out std_logic

Port

Definition at line 82 of file tx_sync.vhd.

TXENPMAPHASEALIGN out std_logic

Port

Definition at line 79 of file tx_sync.vhd.

TXPMASETPHASE out std_logic

Port

Definition at line 80 of file tx_sync.vhd.

UNISIM

Library

Definition at line 69 of file tx_sync.vhd.

UNISIM.VCOMPONENTS.all

Package

Definition at line 70 of file tx_sync.vhd.

USER_CLK in std_logic

Port

Definition at line 84 of file tx_sync.vhd.

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The documentation for this class was generated from the following file:

• Common/trunk/sources/tx_sync.vhd