CMX
CMX firmware code in-line documentation
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RTL Architecture Reference

Processes

PROCESS_103  ( USER_CLK )
PROCESS_104  ( USER_CLK )
PROCESS_105  ( USER_CLK )
PROCESS_106  ( USER_CLK )

Constants

DLY  time := 1 ns

Signals

begin_r  std_logic
phase_align_r  std_logic
ready_r  std_logic
sync_counter_r  unsigned ( 13 downto 0 )
wait_before_setphase_counter_r  unsigned ( 5 downto 0 )
align_reset_counter_r  unsigned ( 4 downto 0 )
wait_before_setphase_r  std_logic
align_reset_r  std_logic
count_setphase_complete_r  std_logic
count_32_complete_r  std_logic
count_align_reset_complete_r  std_logic
next_phase_align_c  std_logic
next_ready_c  std_logic
next_wait_before_setphase_c  std_logic
next_align_reset_c  std_logic

Detailed Description

Definition at line 91 of file tx_sync.vhd.

Member Function Documentation

PROCESS_103 (   USER_CLK  
)
Process

Definition at line 133 of file tx_sync.vhd.

PROCESS_104 (   USER_CLK  
)
Process

Definition at line 166 of file tx_sync.vhd.

PROCESS_105 (   USER_CLK  
)
Process

Definition at line 181 of file tx_sync.vhd.

PROCESS_106 (   USER_CLK  
)
Process

Definition at line 195 of file tx_sync.vhd.

Member Data Documentation

align_reset_counter_r unsigned ( 4 downto 0 )
Signal

Definition at line 103 of file tx_sync.vhd.

align_reset_r std_logic
Signal

Definition at line 105 of file tx_sync.vhd.

begin_r std_logic
Signal

Definition at line 98 of file tx_sync.vhd.

count_32_complete_r std_logic
Signal

Definition at line 110 of file tx_sync.vhd.

count_align_reset_complete_r std_logic
Signal

Definition at line 111 of file tx_sync.vhd.

count_setphase_complete_r std_logic
Signal

Definition at line 109 of file tx_sync.vhd.

DLY time := 1 ns
Constant

Definition at line 94 of file tx_sync.vhd.

next_align_reset_c std_logic
Signal

Definition at line 115 of file tx_sync.vhd.

next_phase_align_c std_logic
Signal

Definition at line 112 of file tx_sync.vhd.

next_ready_c std_logic
Signal

Definition at line 113 of file tx_sync.vhd.

next_wait_before_setphase_c std_logic
Signal

Definition at line 114 of file tx_sync.vhd.

phase_align_r std_logic
Signal

Definition at line 99 of file tx_sync.vhd.

ready_r std_logic
Signal

Definition at line 100 of file tx_sync.vhd.

sync_counter_r unsigned ( 13 downto 0 )
Signal

Definition at line 101 of file tx_sync.vhd.

wait_before_setphase_counter_r unsigned ( 5 downto 0 )
Signal

Definition at line 102 of file tx_sync.vhd.

wait_before_setphase_r std_logic
Signal

Definition at line 104 of file tx_sync.vhd.

The documentation for this class was generated from the following file: