Glink_Encoder Entity Reference

Inheritance diagram for Glink_Encoder:

Entities
rtl	architecture

Libraries
ieee

Use Clauses
ieee.std_logic_1164.all
ieee.std_logic_unsigned.all
ieee.std_logic_arith.all

Ports
Reset	in std_logic
Clock	in std_logic
tx_in	in std_logic_vector ( 19 downto 0 )
TxData	in std_logic
TxCntl	in std_logic
tx_out	out std_logic_vector ( 23 downto 0 )
TDisparity_Q	out std_logic_vector ( 5 downto 0 )
RDPos_Q	out std_logic
RDNeg_Q	out std_logic

Detailed Description

Definition at line 14 of file glink_encoder.vhd.

Member Data Documentation

Clock in std_logic

Port

Definition at line 18 of file glink_encoder.vhd.

ieee

Library

Definition at line 9 of file glink_encoder.vhd.

ieee.std_logic_1164.all

Package

Definition at line 10 of file glink_encoder.vhd.

ieee.std_logic_arith.all

Package

Definition at line 12 of file glink_encoder.vhd.

ieee.std_logic_unsigned.all

Package

Definition at line 11 of file glink_encoder.vhd.

RDNeg_Q out std_logic

Port

Definition at line 29 of file glink_encoder.vhd.

RDPos_Q out std_logic

Port

Definition at line 28 of file glink_encoder.vhd.

Reset in std_logic

Port

Definition at line 17 of file glink_encoder.vhd.

TDisparity_Q out std_logic_vector ( 5 downto 0 )

Port

Definition at line 27 of file glink_encoder.vhd.

tx_in in std_logic_vector ( 19 downto 0 )

Port

Definition at line 20 of file glink_encoder.vhd.

tx_out out std_logic_vector ( 23 downto 0 )

Port

Definition at line 24 of file glink_encoder.vhd.

TxCntl in std_logic

Port

Definition at line 22 of file glink_encoder.vhd.

TxData in std_logic

Port

Definition at line 21 of file glink_encoder.vhd.

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The documentation for this class was generated from the following file:

• Common/trunk/sources/glink_encoder.vhd