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Readout_FIFO Entity Reference
Inheritance diagram for Readout_FIFO:
daq_glink

Entities

RTL  architecture
 

Libraries

ieee 

Use Clauses

ieee.std_logic_1164.all 
ieee.numeric_std.all 
work.CMXpackage.all 

Ports

rst   in STD_LOGIC
wr_clk   in STD_LOGIC
rd_clk   in STD_LOGIC
din   in STD_LOGIC_VECTOR ( 1919 downto 0 )
wr_en   in STD_LOGIC
rd_en   in STD_LOGIC
dout   out STD_LOGIC_VECTOR ( 1919 downto 0 )
full   out STD_LOGIC
empty   out STD_LOGIC

Detailed Description

Definition at line 13 of file Readout_FIFO.vhd.

Member Data Documentation

din in STD_LOGIC_VECTOR ( 1919 downto 0 )
Port

Definition at line 18 of file Readout_FIFO.vhd.

dout out STD_LOGIC_VECTOR ( 1919 downto 0 )
Port

Definition at line 21 of file Readout_FIFO.vhd.

empty out STD_LOGIC
Port

Definition at line 23 of file Readout_FIFO.vhd.

full out STD_LOGIC
Port

Definition at line 22 of file Readout_FIFO.vhd.

ieee
Library

Definition at line 6 of file Readout_FIFO.vhd.

Definition at line 8 of file Readout_FIFO.vhd.

Definition at line 7 of file Readout_FIFO.vhd.

rd_clk in STD_LOGIC
Port

Definition at line 17 of file Readout_FIFO.vhd.

rd_en in STD_LOGIC
Port

Definition at line 20 of file Readout_FIFO.vhd.

rst in STD_LOGIC
Port

Definition at line 15 of file Readout_FIFO.vhd.

Definition at line 10 of file Readout_FIFO.vhd.

wr_clk in STD_LOGIC
Port

Definition at line 16 of file Readout_FIFO.vhd.

wr_en in STD_LOGIC
Port

Definition at line 19 of file Readout_FIFO.vhd.


The documentation for this class was generated from the following file: