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Signals | Processes
Behavioral Architecture Reference

Processes

PROCESS_90  ( clk )

Signals

s0  std_logic
s1  std_logic
s2  std_logic
s3  std_logic
s4  std_logic
s5  std_logic
s6  std_logic
s7  std_logic
s8  std_logic
s9  std_logic

Detailed Description

Definition at line 27 of file Stretch_10.vhd.

Member Function Documentation

PROCESS_90 (   clk  
)
Process

Definition at line 33 of file Stretch_10.vhd.

Member Data Documentation

s0 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s1 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s2 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s3 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s4 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s5 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s6 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s7 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s8 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

s9 std_logic
Signal

Definition at line 28 of file Stretch_10.vhd.

The documentation for this class was generated from the following file: