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system_summing_module Entity Reference
Inheritance diagram for system_summing_module:
CMX_pipeline_module vme_inreg_notri_async

Entities

system_summing_module  architecture
 

Libraries

IEEE 

Use Clauses

ieee.std_logic_1164.all 
ieee.numeric_std.all 
work.CMX_flavor_package.all 
work.CMXpackage.all 
work.CMX_VME_defs.all 

Ports

CLK   in std_logic
ENERGY_CRATE   in std_logic_vector ( 26 * 4 - 1 downto 0 )
ENERGY_REMOTE   in std_logic_vector ( 26 * 4 - 1 downto 0 )
CTP_CABLE_0   out std_logic_vector ( 23 downto 0 )
CTP_CABLE_1   out std_logic_vector ( 23 downto 0 )
MISS_E_THR   in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
MISS_E_RES_THR   in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
SUM_ET_THR   in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
SUM_ET_RES_THR   in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
XS_T2_A2   in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
T_MISS_E_MIN   in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
T_MISS_E_MAX   in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
T_SUM_E_MIN   in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
T_SUM_E_MAX   in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
XS_B2   in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
sums_all_out   out arr_ctr_15bit ( 5 downto 0 )
ov_all_out   out std_logic_vector ( 5 downto 0 )
par_err_cbl   in T_SL

Detailed Description

Definition at line 14 of file system_summing_module.vhd.

Member Data Documentation

CLK in std_logic
Port

Definition at line 16 of file system_summing_module.vhd.

CTP_CABLE_0 out std_logic_vector ( 23 downto 0 )
Port

Definition at line 20 of file system_summing_module.vhd.

CTP_CABLE_1 out std_logic_vector ( 23 downto 0 )
Port

Definition at line 21 of file system_summing_module.vhd.

ENERGY_CRATE in std_logic_vector ( 26 * 4 - 1 downto 0 )
Port

Definition at line 18 of file system_summing_module.vhd.

ENERGY_REMOTE in std_logic_vector ( 26 * 4 - 1 downto 0 )
Port

Definition at line 19 of file system_summing_module.vhd.

IEEE
Library

Definition at line 6 of file system_summing_module.vhd.

ieee.numeric_std.all
Package

Definition at line 9 of file system_summing_module.vhd.

ieee.std_logic_1164.all
Package

Definition at line 8 of file system_summing_module.vhd.

MISS_E_RES_THR in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 25 of file system_summing_module.vhd.

MISS_E_THR in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 24 of file system_summing_module.vhd.

ov_all_out out std_logic_vector ( 5 downto 0 )
Port

Definition at line 37 of file system_summing_module.vhd.

par_err_cbl in T_SL
Port

Definition at line 39 of file system_summing_module.vhd.

SUM_ET_RES_THR in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 27 of file system_summing_module.vhd.

SUM_ET_THR in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 26 of file system_summing_module.vhd.

sums_all_out out arr_ctr_15bit ( 5 downto 0 )
Port

Definition at line 36 of file system_summing_module.vhd.

T_MISS_E_MAX in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 31 of file system_summing_module.vhd.

T_MISS_E_MIN in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 30 of file system_summing_module.vhd.

T_SUM_E_MAX in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 33 of file system_summing_module.vhd.

T_SUM_E_MIN in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 32 of file system_summing_module.vhd.

work.CMX_flavor_package.all
Package

Definition at line 10 of file system_summing_module.vhd.

work.CMX_VME_defs.all
Package

Definition at line 12 of file system_summing_module.vhd.

work.CMXpackage.all
Package

Definition at line 11 of file system_summing_module.vhd.

XS_B2 in arr_ctr_15bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 34 of file system_summing_module.vhd.

XS_T2_A2 in arr_ctr_31bit ( num_thresholds - 1 downto 0 )
Port

Definition at line 28 of file system_summing_module.vhd.

The documentation for this class was generated from the following file: