time_multiplex_8to1 Entity Reference

Inheritance diagram for time_multiplex_8to1:

Entities
Behavioral	architecture

Libraries
IEEE
work

Use Clauses
IEEE.STD_LOGIC_1164.all
work.CMXpackage.all
IEEE.NUMERIC_STD.all

Ports
DATA_in	in std_logic_vector ( 16 * 8 - 1 downto 0 )
send_align	in std_logic
BCID	in std_logic_vector ( 11 downto 0 )
DATA_out	out std_logic_vector ( 17 downto 0 )
subtick_counter_out	out unsigned ( 2 downto 0 )
clk_slow	in std_logic
clk_fast	in std_logic
pll_locked	in std_logic

Detailed Description

Definition at line 30 of file time_multiplex_8to1.vhd.

Member Data Documentation

BCID in std_logic_vector ( 11 downto 0 )

Port

Definition at line 38 of file time_multiplex_8to1.vhd.

clk_fast in std_logic

Port

Definition at line 42 of file time_multiplex_8to1.vhd.

clk_slow in std_logic

Port

Definition at line 41 of file time_multiplex_8to1.vhd.

DATA_in in std_logic_vector ( 16 * 8 - 1 downto 0 )

Port

Definition at line 36 of file time_multiplex_8to1.vhd.

DATA_out out std_logic_vector ( 17 downto 0 )

Port

Definition at line 39 of file time_multiplex_8to1.vhd.

IEEE

Library

Definition at line 14 of file time_multiplex_8to1.vhd.

IEEE.NUMERIC_STD.all

Package

Definition at line 23 of file time_multiplex_8to1.vhd.

IEEE.STD_LOGIC_1164.all

Package

Definition at line 15 of file time_multiplex_8to1.vhd.

pll_locked in std_logic

Port

Definition at line 43 of file time_multiplex_8to1.vhd.

send_align in std_logic

Port

Definition at line 37 of file time_multiplex_8to1.vhd.

subtick_counter_out out unsigned ( 2 downto 0 )

Port

Definition at line 40 of file time_multiplex_8to1.vhd.

work

Library

Definition at line 17 of file time_multiplex_8to1.vhd.

work.CMXpackage.all

Package

Definition at line 18 of file time_multiplex_8to1.vhd.

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The documentation for this class was generated from the following file:

• Common/trunk/sources/time_multiplex_8to1.vhd