CMX
CMX firmware code in-line documentation
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Signals | Processes
Behavioral Architecture Reference

Processes

PROCESS_92  ( clk_slow , pll_locked )
PROCESS_93  ( clk_fast , pll_locked_synced )

Signals

subtick_counter  unsigned ( 2 downto 0 )
subtick_counter_next  unsigned ( 2 downto 0 )
pll_locked_s1  std_logic
pll_locked_synced  std_logic
DATA_out_next  std_logic_vector ( 16 downto 0 )
send_align_reg  std_logic
sel  std_logic_vector ( 3 downto 0 )

Detailed Description

Definition at line 47 of file time_multiplex_8to1.vhd.

Member Function Documentation

PROCESS_92 (   clk_slow ,
  pll_locked  
)
Process

Definition at line 100 of file time_multiplex_8to1.vhd.

PROCESS_93 (   clk_fast ,
  pll_locked_synced  
)
Process

Definition at line 116 of file time_multiplex_8to1.vhd.

Member Data Documentation

DATA_out_next std_logic_vector ( 16 downto 0 )
Signal

Definition at line 55 of file time_multiplex_8to1.vhd.

pll_locked_s1 std_logic
Signal

Definition at line 53 of file time_multiplex_8to1.vhd.

pll_locked_synced std_logic
Signal

Definition at line 53 of file time_multiplex_8to1.vhd.

sel std_logic_vector ( 3 downto 0 )
Signal

Definition at line 60 of file time_multiplex_8to1.vhd.

send_align_reg std_logic
Signal

Definition at line 57 of file time_multiplex_8to1.vhd.

subtick_counter unsigned ( 2 downto 0 )
Signal

Definition at line 49 of file time_multiplex_8to1.vhd.

subtick_counter_next unsigned ( 2 downto 0 )
Signal

Definition at line 50 of file time_multiplex_8to1.vhd.

The documentation for this class was generated from the following file: