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daq_collector Entity Reference
Inheritance diagram for daq_collector:
parity_gen

Entities

Behavioral  architecture
 

Libraries

IEEE 
work 

Use Clauses

IEEE.STD_LOGIC_1164.all 
IEEE.NUMERIC_STD.all 
IEEE.STD_LOGIC_UNSIGNED.all 
IEEE.STD_LOGIC_ARITH.CONV_STD_LOGIC_VECTOR 
work.CMXpackage.all 
work.CMX_flavor_package.all 

Ports

clk   in T_SL
datai   in arr_4Xword ( max_jems - 1 downto 0 )
din_cbl   in T_SLV65
din_cbl_ro   in T_SL
din_lcl   in T_SLV60
din_lcl_ro   in T_SL
dout   in T_SLV62
dout_ro   in T_SL
data_in_daq   out arr_96 ( 19 downto 0 )
BCID_in   in std_logic_vector ( 11 downto 0 )
BCID_delayed   out std_logic_vector ( 11 downto 0 )
din_cbla_ro   in T_SL
din_cblb_ro   in T_SL
din_cblc_ro   in T_SL
energy_remote   in std_logic_vector ( 26 * 4 - 1 downto 0 )
energy_local   in std_logic_vector ( 26 * 4 - 1 downto 0 )
energy_total   in arr_ctr_15bit ( 5 downto 0 )
energy_ovflw   in std_logic_vector ( 5 downto 0 )
energy_extra0   in std_logic_vector ( 23 downto 0 )
energy_extra1   in std_logic_vector ( 23 downto 0 )

Detailed Description

Definition at line 22 of file daq_collector.vhd.

Member Data Documentation

BCID_delayed out std_logic_vector ( 11 downto 0 )
Port

Definition at line 34 of file daq_collector.vhd.

BCID_in in std_logic_vector ( 11 downto 0 )
Port

Definition at line 33 of file daq_collector.vhd.

clk in T_SL
Port

Definition at line 24 of file daq_collector.vhd.

data_in_daq out arr_96 ( 19 downto 0 )
Port

Definition at line 32 of file daq_collector.vhd.

datai in arr_4Xword ( max_jems - 1 downto 0 )
Port

Definition at line 25 of file daq_collector.vhd.

din_cbl in T_SLV65
Port

Definition at line 26 of file daq_collector.vhd.

din_cbl_ro in T_SL
Port

Definition at line 27 of file daq_collector.vhd.

din_cbla_ro in T_SL
Port

Definition at line 28 of file daq_collector.vhd.

din_cblb_ro in T_SL
Port

Definition at line 29 of file daq_collector.vhd.

din_cblc_ro in T_SL
Port

Definition at line 30 of file daq_collector.vhd.

din_lcl in T_SLV60
Port

Definition at line 28 of file daq_collector.vhd.

din_lcl_ro in T_SL
Port

Definition at line 29 of file daq_collector.vhd.

dout in T_SLV62
Port

Definition at line 30 of file daq_collector.vhd.

dout_ro in T_SL
Port

Definition at line 31 of file daq_collector.vhd.

energy_extra0 in std_logic_vector ( 23 downto 0 )
Port

Definition at line 28 of file daq_collector.vhd.

energy_extra1 in std_logic_vector ( 23 downto 0 )
Port

Definition at line 29 of file daq_collector.vhd.

energy_local in std_logic_vector ( 26 * 4 - 1 downto 0 )
Port

Definition at line 25 of file daq_collector.vhd.

energy_ovflw in std_logic_vector ( 5 downto 0 )
Port

Definition at line 27 of file daq_collector.vhd.

energy_remote in std_logic_vector ( 26 * 4 - 1 downto 0 )
Port

Definition at line 24 of file daq_collector.vhd.

energy_total in arr_ctr_15bit ( 5 downto 0 )
Port

Definition at line 26 of file daq_collector.vhd.

IEEE
Library

Definition at line 11 of file daq_collector.vhd.

IEEE.NUMERIC_STD.all
Package

Definition at line 13 of file daq_collector.vhd.

IEEE.STD_LOGIC_1164.all
Package

Definition at line 12 of file daq_collector.vhd.

IEEE.STD_LOGIC_ARITH.CONV_STD_LOGIC_VECTOR
Package

Definition at line 15 of file daq_collector.vhd.

IEEE.STD_LOGIC_UNSIGNED.all
Package

Definition at line 14 of file daq_collector.vhd.

work
Library

Definition at line 17 of file daq_collector.vhd.

work.CMX_flavor_package.all
Package

Definition at line 19 of file daq_collector.vhd.

work.CMXpackage.all
Package

Definition at line 18 of file daq_collector.vhd.

The documentation for this class was generated from the following file: