daq_collector.vhd

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.CONV_STD_LOGIC_VECTOR;

LIBRARY work;
use work.CMXpackage.all;
use work.CMX_flavor_package.all;


entity daq_collector is
  port (
    clk         : in std_logic;
    datai       : in  arr_4Xword(max_cps-1 downto 0);
    din_cbl     : in  T_SLV150;
    din_cbla_ro : in  T_SL;
    din_cblb_ro : in  T_SL;
    din_cblc_ro : in  T_SL;
    din_lcl     : in  T_SLV48;
    din_lcl_ro  : in  T_SL;
    dout        : in  T_SLV62;
    dout_ro     : in  T_SL;
    data_in_daq : out arr_96(19 downto 0);
    BCID_in     : in std_logic_vector(11 downto 0);
    BCID_delayed : out std_logic_vector(11 downto 0));  
end daq_collector;

architecture Behavioral of daq_collector is

  component parity_gen 
    GENERIC( 
      width : integer := 60
      );
    PORT( 
      din    : IN     std_logic_vector (width-1 downto 0) ;
      parity : OUT    std_logic 
      );
  end component;
  

-- signal declarations

  
  attribute keep : string;  
 

  signal datai_r       :   arr_4Xword(max_cps-1 downto 0);
  signal din_cbl_r     :   T_SLV150;
  signal din_cbla_ro_r :   T_SL;
  signal din_cblb_ro_r :   T_SL;
  signal din_cblc_ro_r :   T_SL;
  signal din_lcl_r     :   T_SLV48;
  signal din_lcl_ro_r  :   T_SL;
  signal dout_r        :   T_SLV62;
  signal dout_ro_r     :   T_SL;

  signal din_cbl_rr     :   T_SLV150;
  signal din_cbla_ro_rr :   T_SL;
  signal din_cblb_ro_rr :   T_SL;
  signal din_cblc_ro_rr :   T_SL;
  signal din_lcl_rr     :   T_SLV48;
  signal din_lcl_ro_rr  :   T_SL;
  signal dout_rr        :   T_SLV62;
  signal dout_ro_rr     :   T_SL;

  signal cpm_occupied_map   : T_SLV14;
  signal cpm_mult           : T_SLV42;
  signal datai_corr         : arr_4Xword(max_cps-1 downto 0);

  signal calc_par           : calc_parity_type(max_cps-1 downto 0);
  signal par_err            : calc_parity_type(max_cps-1 downto 0);

  signal par_err_cbla_mux0  : T_SL;
  signal par_err_cbla_mux1  : T_SL;
  signal par_err_cblb_mux0  : T_SL;
  signal par_err_cblb_mux1  : T_SL;
  signal par_err_cblc_mux0  : T_SL;
  signal par_err_cblc_mux1  : T_SL;

  signal par_calc_cbla_mux0 : T_SL;
  signal par_calc_cbla_mux1 : T_SL;
  signal par_calc_cblb_mux0 : T_SL;
  signal par_calc_cblb_mux1 : T_SL;
  signal par_calc_cblc_mux0 : T_SL;
  signal par_calc_cblc_mux1 : T_SL;

  signal ntobs_low  : ntobsA_type(max_cps-1 downto 0);
  signal ntobs_high : ntobsA_type(max_cps-1 downto 0);
  signal ntobs_tot  : ntobstot_type(max_cps-1 downto 0);

  signal BCID_r : std_logic_vector(11 downto 0);


  attribute keep of datai_r, din_cbl_r, din_cbla_ro_r, din_cblb_ro_r, din_cblc_ro_r, din_lcl_r, din_lcl_ro_r, dout_r, dout_ro_r : signal is "TRUE";     




    
  
begin

  --first register all data locally, and everything except data_i doublr reg
  --data_i_r will have parity error added synchroneously below
  process(clk)
  begin
    if rising_edge(clk) then
      
      BCID_delayed<=BCID_r;
      BCID_r<=BCID_in;

      datai_r       <= datai;       
      din_cbl_r     <= din_cbl;     
      din_cbla_ro_r <= din_cbla_ro; 
      din_cblb_ro_r <= din_cblb_ro; 
      din_cblc_ro_r <= din_cblc_ro; 
      din_lcl_r     <= din_lcl;     
      din_lcl_ro_r  <= din_lcl_ro;  
      dout_r        <= dout;        
      dout_ro_r     <= dout_ro;

      din_cbl_rr     <= din_cbl_r;     
      din_cbla_ro_rr <= din_cbla_ro_r; 
      din_cblb_ro_rr <= din_cblb_ro_r; 
      din_cblc_ro_rr <= din_cblc_ro_r; 
      din_lcl_rr     <= din_lcl_r;     
      din_lcl_ro_rr  <= din_lcl_ro_r;  
      dout_rr        <= dout_r;        
      dout_ro_rr     <= dout_ro_r;
      
    end if;
  end process;

      
  
  par_err_i: for i in 0 to max_cps-1 generate
    par_err_j: for j in 0 to 3 generate
      
      calc_par_i : parity_gen
        generic map (
          width  => 23
          )
        port map (
          din  => datai_r (i)((24*j)+22 downto 24*j),
          parity  => calc_par(i)(j)
          );

      par_err(i)(j) <= calc_par(i)(j) xor datai_r(i)((24*j)+23);   -- parity error 

      
      process(clk)
      begin
        if rising_edge(clk) then
          datai_corr(i)((24*j)+23 downto 24*j) <=  par_err(i)(j) & datai_r(i)((24*j)+22 downto 24*j);
        end if;
      end process;

      
    end generate;
  end generate; 
   
  
  calc_par_cbla_mux0 : parity_gen     -- parity bit calc. (cbla,mux0)
    generic map (
      width  => 24
      )
    port map (
      din  => din_cbl_r(23 downto 0),
      parity  => par_calc_cbla_mux0
      );

  -- overflow added by Pawel Plucinski 2015-08-21
  calc_par_cbla_mux1 : parity_gen     -- parity bit calc. (cbla,mux1)
    generic map (
      width  => 25
      )
    port map (
      din  => din_cbla_ro_r & din_cbl_r   (47 downto 24),
      parity  => par_calc_cbla_mux1
      );

  calc_par_cblb_mux0 : parity_gen     -- parity bit calc. (cblb,mux0)
    generic map (
      width  => 24
      )
    port map (
      din  => din_cbl_r(71 downto 48),
      parity  => par_calc_cblb_mux0    
      );


  -- overflow added by Pawel Plucinski 2015-08-21
  calc_par_cblb_mux1 : parity_gen     -- parity bit calc. (cblb,mux1)
    generic map (
      width  => 25
      )
    port map (
      din  => din_cblb_ro_r & din_cbl_r   (95 downto 72),
      parity  => par_calc_cblb_mux1    
      );

  calc_par_cblc_mux0 : parity_gen     -- parity bit calc. (cblc,mux0)
    generic map (
      width  => 24
      )
    port map (
      din  => din_cbl_r(119 downto 96),
      parity  => par_calc_cblc_mux0    
      );

  -- overflow added by Pawel Plucinski 2015-08-21
  calc_par_cblc_mux1 : parity_gen     -- parity bit calc. (cblc,mux1)
    generic map (
      width  => 25
      )
    port map (
      din  => din_cblc_ro_r & din_cbl_r   (143 downto 120),
      parity  => par_calc_cblc_mux1    
      );


  process(clk)
  begin
    if rising_edge(clk) then
      par_err_cbla_mux0 <= par_calc_cbla_mux0 xor din_cbl_r(144);   -- parity error (cbla,mux0)
      par_err_cbla_mux1 <= par_calc_cbla_mux1 xor din_cbl_r(145);   -- parity error (cbla,mux1)

      par_err_cblb_mux0 <= par_calc_cblb_mux0 xor din_cbl_r(146);   -- parity error (cblb,mux0)
      par_err_cblb_mux1 <= par_calc_cblb_mux1 xor din_cbl_r(147);   -- parity error (cblb,mux1)

      par_err_cblc_mux0 <= par_calc_cblc_mux0 xor din_cbl_r(148);   -- parity error (cblc,mux0)
      par_err_cblc_mux1 <= par_calc_cblc_mux1 xor din_cbl_r(149);   -- parity error (cblc,mux1)
    end if;
  end process;

--
-- backplane data
--

  gen_daq_data: for i_source in 0 to max_cps-1 generate
    data_in_daq(i_source)<=datai_corr(i_source);
  end generate gen_daq_data;
  
--
-- multiplicity remote, cbla  
--
  data_in_daq(14)(23 downto 0)  <= din_cbl_rr(23 downto 0);   -- 3 bit multiplicity
  data_in_daq(14)(24)           <= par_err_cbla_mux0;      -- parity error
  data_in_daq(14)(48 downto 25) <= din_cbl_rr(47 downto 24);  -- 3 bit multiplicity
  data_in_daq(14)(49)           <= par_err_cbla_mux1;                
  data_in_daq(14)(50)           <= din_cbla_ro_rr;            -- remote overflow, cbla
  data_in_daq(14)(95 downto 51) <= (others=>'0');         

--
-- multiplicity remote, cblb  
--
  data_in_daq(15)(23 downto 0)  <= din_cbl_rr(71 downto 48);  -- 3 bit multiplicity
  data_in_daq(15)(24)           <= par_err_cblb_mux0;      -- parity error
  data_in_daq(15)(48 downto 25) <= din_cbl_rr(95 downto 72);  -- 3 bit multiplicity
  data_in_daq(15)(49)           <= par_err_cblb_mux1;                
  data_in_daq(15)(50)           <= din_cblb_ro_rr;            -- remote overflow, cblb
  data_in_daq(15)(95 downto 51) <= (others=>'0');         

--
-- multiplicity remote, cblc  
--
  data_in_daq(16)(23 downto 0)  <= din_cbl_rr(119 downto 96);  -- 3 bit multiplicity
  data_in_daq(16)(24)           <= par_err_cblc_mux0;       -- parity error
  data_in_daq(16)(48 downto 25) <= din_cbl_rr(143 downto 120); -- 3 bit multiplicity
  data_in_daq(16)(49)           <= par_err_cblc_mux1;                
  data_in_daq(16)(50)           <= din_cblc_ro_rr;             -- remote overflow, cblc
  data_in_daq(16)(95 downto 51) <= (others=>'0');         

--
-- multiplicity local  
--

  data_in_daq(17)(23 downto 0)  <= din_lcl_rr(23 downto 0);  -- 3 bit multiplicity
  data_in_daq(17)(24)           <= '0';
  data_in_daq(17)(48 downto 25) <= din_lcl_rr(47 downto 24); -- 3 bit multiplicity
  data_in_daq(17)(49)           <= '0';           
  data_in_daq(17)(50)           <= din_lcl_ro_rr;            -- local overflow
  data_in_daq(17)(95 downto 51) <= (others=>'0');              

--
-- multiplicity global  
--

  data_in_daq(18)(23 downto 0)  <= dout_rr(23 downto 0);  -- 3 bit multiplicity
  data_in_daq(18)(24)           <= '0';
  data_in_daq(18)(48 downto 25) <= dout_rr(54 downto 31); -- 3 bit multiplicity
  data_in_daq(18)(49)           <= '0';           
  data_in_daq(18)(50)           <= dout_ro_rr;            -- local overflow
  data_in_daq(18)(95 downto 51) <= (others=>'0');              

  
--
-- Additional data
--
  
  data_in_daq(19)(28 downto 0)  <= (others=>'0');  
  data_in_daq(19)(42 downto 29) <= cpm_occupied_map;    
  data_in_daq(19)(84 downto 43) <= cpm_mult;        
  data_in_daq(19)(95 downto 85) <= (others=>'0'); -- zero
   
  gen_cpm_occupied_map: for i_cpm in 0 to max_cps-1 generate
    process(clk)
    begin
      if rising_edge(clk) then
        if datai_r(i_cpm)(15 downto 0) > 0 then
          cpm_occupied_map(i_cpm) <= '1';
        else
          cpm_occupied_map(i_cpm) <= '0';
        end if;
      end if;
    end process;
  end generate;


-- CPM multiplicity calc.

  gen_cpm_ntobs: for i_cpm in 0 to max_cps-1 generate

    ntobs_low(i_cpm) <= Rxpos_sort(conv_integer(datai_r(i_cpm)(7 downto 0)))(7 downto 5);
    ntobs_high(i_cpm) <= Rxpos_sort(conv_integer(datai_r(i_cpm)(15 downto 8)))(7 downto 5);

    ntobs_tot(i_cpm)<=std_logic_vector(resize(unsigned(ntobs_low(i_cpm)),4) + resize(unsigned(ntobs_high(i_cpm)),4));

    process(clk)
    begin
      if rising_edge(clk) then
        if ntobs_tot(i_cpm) > 5 then
          cpm_mult(3*i_cpm+2 downto 3*i_cpm) <= "111";
        else
          cpm_mult(3*i_cpm+2 downto 3*i_cpm) <= ntobs_tot(i_cpm)(2 downto 0);
        end if;
      end if;
    end process;
    
  end generate;

  
end Behavioral;