CMX_flavor_package.vhd

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

library work;

use work.CMXpackage.all;

package CMX_flavor_package is

  constant version_flavor_common : std_logic_vector(15 downto 0):=x"F0A3";
  
  
  type arr_s0word is array(3 downto 0) of std_logic_vector(15 downto 0); 
  type arr_s1word is array(3 downto 0) of std_logic_vector(7 downto 0); 


  CONSTANT max_tobs_tot        : integer := 70;
  CONSTANT max_tobs_topo       : integer := 30;
  CONSTANT max_cps             : integer := 14;
  CONSTANT max_tobs_pcp        : integer := 5;
  CONSTANT thresholds_num      : integer := 16;
  CONSTANT thresholds_width    : integer := 10;
  CONSTANT max_eta_slices      : integer := 4;

  constant num_presence_bits_pcp : integer :=16;

  
  type Low_word is array (integer range <>) of arr_s0word;
  type High_word is array (integer range <>) of arr_s1word;

  --from first/last four CP chips  
  type num_tobs_half is array(max_cps-1 downto 0) of std_logic_vector(3 downto 0);
  --sum of the number of tobs from two subsets of CP chips
  type num_tobs is array(max_cps-1 downto 0) of unsigned(4 downto 0);
  type ntobs_type is array(15 downto 0) of std_logic_vector(2 downto 0);
  type ptr_sort is array(15 downto 0) of std_logic_vector(6 downto 0);
  type ptr_presort is array(15 downto 0) of std_logic_vector(3 downto 0);
  type ptr_jem   is array(16 downto 0) of std_logic_vector(6 downto 0);

  --four top bits contain number of TOBs in that half of the CPM
  type pos_type_ext is array(max_cps-1 downto 0) of std_logic_vector(23 downto 0); 
  type pos_type is array(max_cps-1 downto 0) of std_logic_vector(19 downto 0);

  type thPatG_type  is array(integer range <>) of std_logic_vector(120 downto 0);

  
  
  type EmTauTOB is record
    CLE   : std_logic_vector (7 downto 0); -- cluster energy
    ISO   : std_logic_vector (4 downto 0); -- isolations bits
    POS   : std_logic_vector (9 downto 0); -- combined position information
  end record;

  type arr_TOB      is array (integer range <>) of EmTauTOB;  
  
  constant num_copies : integer :=4;

  type copy_arr_TOB is array (num_copies-1 downto 0) of arr_TOB(max_tobs_topo-1 downto 0);

  
  constant num_sort_layers: integer := 28;
  type type_TOB_sort_layers is array(num_sort_layers-1 downto 0) of arr_TOB(max_tobs_tot-1 downto 0);

  --this is for holding adresses of the fields in the backplane data 
  type t_arr_addr is array(4 downto 0) of integer range 0 to 90;
  constant  arr_addr_CLE_Lo : t_arr_addr:= (72,56,48,32,24);  --  (24,32,48,56,72);
  constant  arr_addr_ISO_Lo : t_arr_addr:= (90,82,66,42,18);  --  (18,42,66,82,90);
  constant  arr_addr_POS_Lo : t_arr_addr:= (88,80,64,40,16);  --  (16,40,64,80,88);


  constant TO_EmTau_CLE_size : integer := 8;
  constant TO_EmTau_ISO_size : integer := 5;
  constant TO_EmTau_POS_size : integer := 10;
  
  constant TO_EmTau_size : integer := TO_EmTau_CLE_size +TO_EmTau_ISO_size +TO_EmTau_POS_size;
  

  
  --type adder_type is array(15 downto 0) of std_logic_vector(2 downto 0);
  --constant mult_i : adder_type:=("100","011","011","010",
  --                               "011","010","010","001",
--                                         "011","010","010","001",
--                                         "010","001","001","000"); 

  
  
  type fpos_type    is array(integer range <>) of std_logic_vector(19 downto 0);
  type thPatL_type  is array(integer range <>) of std_logic_vector(79 downto 0);

  type par_type     is array(integer range <>) of std_logic;

  constant zero : std_logic:='0';   
  constant frame_8 : std_logic_vector(7 downto 0):=(others => '0');   
  constant frame_7 : std_logic_vector(6 downto 0):=(others => '0');
  constant frame_6 : std_logic_vector(5 downto 0):=(others => '0');   

  subtype T_SL      is std_logic;
  subtype T_SLV2    is std_logic_vector(1 downto 0);
  subtype T_SLV3    is std_logic_vector(2 downto 0);
  subtype T_SLV4    is std_logic_vector(3 downto 0);
  subtype T_SLV12   is std_logic_vector(11 downto 0);
  subtype T_SLV13   is std_logic_vector(12 downto 0);
  subtype T_SLV14   is std_logic_vector(13 downto 0);
  subtype T_SLV24   is std_logic_vector(23 downto 0);
  subtype T_SLV25   is std_logic_vector(24 downto 0);
  subtype T_SLV30   is std_logic_vector(29 downto 0);
  subtype T_SLV32   is std_logic_vector(31 downto 0);
  subtype T_SLV16   is std_logic_vector(15 downto 0);
  subtype T_SLV42   is std_logic_vector(41 downto 0);
  subtype T_SLV48   is std_logic_vector(47 downto 0);
  subtype T_SLV49   is std_logic_vector(48 downto 0);
  subtype T_SLV50   is std_logic_vector(49 downto 0);
  subtype T_SLV60   is std_logic_vector(59 downto 0);
  subtype T_SLV61   is std_logic_vector(60 downto 0);
  subtype T_SLV62   is std_logic_vector(61 downto 0);
  subtype T_SLV65   is std_logic_vector(64 downto 0);
  subtype T_SLV75   is std_logic_vector(74 downto 0);
  subtype T_SLV120  is std_logic_vector(119 downto 0);
  subtype T_SLV150  is std_logic_vector(149 downto 0);  
  subtype T_SLV121  is std_logic_vector(120 downto 0);
  subtype T_SLV1936 is std_logic_vector(1935 downto 0);
  

  type nx3_array is array (integer range <>) of std_logic_vector ( 2 downto 0);
  type nx4_array  is array(integer range <>) of std_logic_vector(3 downto 0);
  type nx8_array is array  (integer range <>) of std_logic_vector(7 downto 0);
  type nx13_array is array (integer range <>) of std_logic_vector(12 downto 0);
  type nx24_array is array (integer range <>) of std_logic_vector(23 downto 0);
  type nx25_array is array (integer range <>) of std_logic_vector(24 downto 0);
  type nx26_array is array (integer range <>) of std_logic_vector(25 downto 0);
  type nx32_array is array (integer range <>) of std_logic_vector(31 downto 0);
  type nx35_array is array (integer range <>) of std_logic_vector(34 downto 0);
  type nx60_array is array (integer range <>) of std_logic_vector(59 downto 0);
  type nx100_array is array(integer range <>) of std_logic_vector(99 downto 0);
  type nx121_array is array(integer range <>) of std_logic_vector(120 downto 0);

  type nxmx4_array  is array(integer range <>,integer range <> ) of std_logic_vector(3 downto 0);

  type int_array is array (integer range <>) of integer;

  type threshold_slice       is array(integer range <>) of T_SLV13;
  type threshold_cp          is array(integer range <>) of threshold_slice(max_eta_slices-1 downto 0);
  type threshold_type        is array(integer range <>) of threshold_cp(thresholds_num-1 downto 0);

  type mult_type_a is array (integer range <>) of std_logic_vector(2 downto 0); 
  type mult_type   is array (integer range <>) of mult_type_a(15 downto 0);                       
  
  type xsum_type_a is array(integer range <>) of std_logic_vector(3 downto 0);              
  type xsum_type   is array(integer range <>) of xsum_type_a(6 downto 0);
  
  type totsum_type is array(integer range <>) of integer;

  
  type adder_type is array(31 downto 0) of std_logic_vector(2 downto 0);
  constant mult_i : adder_type:=("101","100","100","011","100","011","011","010","100","011","011",
                                 "010","011","010","010","001","100","011","011","010","011","010",
                                 "010","001","011","010","010","001","010","001","001","000"); 

  type loc_type_a is array(integer range <>) of std_logic_vector(1 downto 0);
  type loc_type is array(integer range <>) of loc_type_a(max_tobs_pcp-1 downto 0);
  type Rxpos_type    is array(integer range <>) of std_logic_vector(4 downto 0);                                      
  type ntobsA_type is array(integer range <>) of std_logic_vector(2 downto 0);
  type ntobstot_type is array(integer range <>) of std_logic_vector(3 downto 0);
  
  type calc_parity_typa_a is array(integer range <>) of T_SL;
  type calc_parity_type is array(integer range <>) of calc_parity_typa_a(3 downto 0);

  type Rxpos_sort_type is array(0 to 255) of std_logic_vector(7 downto 0);
  constant Rxpos_sort : Rxpos_sort_type:=(
    "00000000",
    "00100000",
    "00100001",
    "01000010",
    "00100000",
    "01000000",
    "01000001",
    "01100010",
    "00100001",
    "01000010",
    "01000011",
    "01100110",
    "01000010",
    "01100100",
    "01100101",
    "10001010",
    "00100000",
    "01000000",
    "01000001",
    "01100010",
    "01000000",
    "01100000",
    "01100001",
    "10000010",
    "01000001",
    "01100010",
    "01100011",
    "10000110",
    "01100010",
    "10000100",
    "10000101",
    "10101010",
    "00100001",
    "01000010",
    "01000011",
    "01100110",
    "01000010",
    "01100100",
    "01100101",
    "10001010",
    "01000011",
    "01100110",
    "01100111",
    "10001110",
    "01100110",
    "10001100",
    "10001101",
    "10111010",
    "01000010",
    "01100100",
    "01100101",
    "10001010",
    "01100100",
    "10001000",
    "10001001",
    "10110010",
    "01100101",
    "10001010",
    "10001011",
    "10110110",
    "10001010",
    "10110100",
    "10110101",
    "11001010",
    "00100000",
    "01000000",
    "01000001",
    "01100010",
    "01000000",
    "01100000",
    "01100001",
    "10000010",
    "01000001",
    "01100010",
    "01100011",
    "10000110",
    "01100010",
    "10000100",
    "10000101",
    "10101010",
    "01000000",
    "01100000",
    "01100001",
    "10000010",
    "01100000",
    "10000000",
    "10000001",
    "10100010",
    "01100001",
    "10000010",
    "10000011",
    "10100110",
    "10000010",
    "10100100",
    "10100101",
    "11001010",
    "01000001",
    "01100010",
    "01100011",
    "10000110",
    "01100010",
    "10000100",
    "10000101",
    "10101010",
    "01100011",
    "10000110",
    "10000111",
    "10101110",
    "10000110",
    "10101100",
    "10101101",
    "11011010",
    "01100010",
    "10001000",
    "10000101",
    "10101010",
    "10000100",
    "10101000",
    "10101001",
    "11010010",
    "10000101",
    "10101010",
    "10101011",
    "11010110",
    "10101010",
    "11010100",
    "11010101",
    "10101010",
    "00100001",
    "01000010",
    "01000011",
    "01100110",
    "01000010",
    "01100100",
    "01100101",
    "10001010",
    "01000011",
    "01100110",
    "01100111",
    "10001110",
    "01100110",
    "10001100",
    "10001101",
    "10111010",
    "01000010",
    "01100100",
    "01100101",
    "10001010",
    "01100100",
    "10001000",
    "10001001",
    "10110010",
    "01100101",
    "10001010",
    "10001011",
    "10110110",
    "10001010",
    "10110100",
    "10110101",
    "11001010",
    "01000011",
    "01100110",
    "01100111",
    "10001110",
    "01100110",
    "10001100",
    "10001101",
    "10111010",
    "01100111",
    "10001110",
    "10001111",
    "10111110",
    "10001110",
    "10111100",
    "10111101",
    "11011010",
    "01100110",
    "10001100",
    "10001101",
    "10111010",
    "10001100",
    "10111000",
    "10111001",
    "11010010",
    "10001101",
    "10111010",
    "10111011",
    "11010110",
    "10111010",
    "11010100",
    "11010101",
    "11101010",
    "01000010",
    "01100100",
    "01100101",
    "10001010",
    "01100100",
    "10001000",
    "10001001",
    "10110010",
    "01100101",
    "10001010",
    "10001011",
    "10110110",
    "10001010",
    "10110100",
    "10110101",
    "11001010",
    "01100100",
    "10001000",
    "10001001",
    "10110010",
    "10001000",
    "10110000",
    "10110001",
    "11000010",
    "10001001",
    "10110010",
    "10110011",
    "11000110",
    "10110010",
    "11000100",
    "11000101",
    "11101010",
    "01100101",
    "10001010",
    "10001011",
    "10110110",
    "10001010",
    "10110100",
    "10110101",
    "10101010",
    "10001011",
    "10110110",
    "10110111",
    "10101110",
    "10110110",
    "10101100",
    "10101101",
    "10111010",
    "10001010",
    "10110100",
    "10110101",
    "10101010",
    "10110100",
    "10101000",
    "10101001",
    "10110010",
    "10110101",
    "10101010",
    "10101011",
    "10110110",
    "10101010",
    "10110100",
    "10110101",
    "10101010");


  type cnt_mult_arr is array(integer range <>) of std_logic_vector(31 downto 0);
  type cnt_mult_arr_2x16 is array(integer range <>) of std_logic_vector(15 downto 0);
  
  procedure Conv3to2 
    ( signal a: in std_logic_vector (2 downto 0);
      signal b: out std_logic_vector (1 downto 0)) is
  begin
    if a(2) = '1' then
      b <= "11";
    else
      b <= a(1 downto 0);
    end if;
  end Conv3to2; 

  ----------
  function add3x2 (
    a: std_logic_vector (2 downto 0);   
    b: std_logic_vector (2 downto 0)
    ) 
    return std_logic_vector is
    ----------
    -- add two 3-bit numbers, return 4-bit sum
    -- 
    variable isum: integer range 0 to 15;
    variable vsum: std_logic_vector(3 downto 0);
  ----------
  begin
    isum :=   to_integer(unsigned(a))
              + to_integer(unsigned(b));
    vsum := std_logic_vector(to_unsigned(isum,4));
    return vsum;
  end add3x2;



end CMX_flavor_package;