trig_sim.vhd

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--------------------------------------------------------------------------------
-- Company: 
-- Engineer:
--
-- Create Date:   21:51:17 02/02/2010
-- Design Name:   
-- Module Name:   C:/DESIGN/PP_Design/vtrig/v0/vtrg/CMX_top_Base_tb.vhd
-- Project Name:  vtrg0
-- Target Device:  
-- Tool versions:  
-- Description:   
-- 
-- VHDL Test Bench Created by ISE for module: trigger
-- 
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes: 
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test.  Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation 
-- simulation model.
--------------------------------------------------------------------------------

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
USE ieee.numeric_std.ALL;
use ieee.std_logic_textio.all;
use std.textio.all;

library work;
use work.CMXpackage.all;
use work.CMX_VME_defs.all;





ENTITY CMX_top_Base_tb IS
END CMX_top_Base_tb;

ARCHITECTURE behavior OF CMX_top_Base_tb IS 
  
  -- Component Declaration for the Unit Under Test (UUT)
  
  
  function to_std_logic(c: character) return std_logic is 
    variable sl: std_logic;
  begin
    case c is
      when 'U' => 
        sl := 'U'; 
      when 'X' =>
        sl := 'X';
      when '0' => 
        sl := '0';
      when '1' => 
        sl := '1';
      when 'Z' => 
        sl := 'Z';
      when 'W' => 
        sl := 'W';
      when 'L' => 
        sl := 'L';
      when 'H' => 
        sl := 'H';
      when '-' => 
        sl := '-';
      when others =>
        sl := 'X'; 
    end case;
    return sl;
  end to_std_logic;

  
  function str_to_stdvec(inp: string) return std_logic_vector is
    variable temp: std_logic_vector(inp'range) := (others => 'X');
  begin 
    for i in inp'range loop
      if (inp(i) = '1') then
        temp(i) := '1';
      elsif (inp(i) = '0') then
        temp(i) := '0'; 
      end if;
    end loop;
    return temp;
  end function str_to_stdvec;

  ---------------------------------------------------------------------------
  -- Function INT2SLV converts an integer to a std_logic_vector
  ---------------------------------------------------------------------------
  function INT2SLV(
    val : integer;
    size: integer :=32
    ) return std_logic_vector is

    variable result: std_logic_vector(size-1 downto 0);
    variable temp: integer;

  begin
    temp := val;
    for i in 0 to size-1 loop
      if (temp mod 2) = 1 then
        result(i) := '1';
      else
        result(i) := '0';
      end if;

      if temp > 0 then
        temp := temp / 2;
      elsif (temp > integer'low) then
        temp := (temp - 1) / 2; -- simulate ASR
      else
        temp := temp / 2; -- simulate ASR
      end if;
    end loop;

    return result;
  end INT2SLV;

  ---------------------------------------------------------------------------
  -- Function INT2SLV16 converts an integer to a 16 bit std_logic_vector
  ---------------------------------------------------------------------------
  function INT2SLV16(
    val : integer
    ) return std_logic_vector is

  begin
    return INT2SLV(val, 16);

  end INT2SLV16;
  
  
  -- Clocks
  signal CLK_120MHz000_XTAL_1_BF_TRNCV_DIR  : std_logic := '0';
  signal CLK_120MHz000_XTAL_1_BF_TRNCV_CMP  : std_logic := '0';
  signal CLK40_DIR : std_logic := '0';
  signal CLK40_CMP : std_logic := '0';
  signal CLK160    : std_logic := '0';
  signal CLK80     : std_logic := '0';  
  
  -- Clock period definitions
  constant CLK40_DIR_period  : time := 24.95 ns;
  constant CLK160_period     : time := 6.25 ns;
  constant CLK80_period      : time := 12.50 ns;
  constant CLK120_period     : time := 8.33 ns;


  
  FILE data_jem0:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test0.txt";    
  FILE data_jem1:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test1.txt";    
  FILE data_jem2:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test2.txt";    
  FILE data_jem3:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test3.txt";    
  FILE data_jem4:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test4.txt";    
  FILE data_jem5:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test5.txt";    
  FILE data_jem6:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test6.txt";    
  FILE data_jem7:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test7.txt";    
  FILE data_jem8:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test8.txt";    
  FILE data_jem9:  TEXT open READ_MODE is  "../../Jet_common/trunk/data/test9.txt";    
  FILE data_jem10:  TEXT open READ_MODE is "../../Jet_common/trunk/data/test10.txt";    
  FILE data_jem11:  TEXT open READ_MODE is "../../Jet_common/trunk/data/test11.txt";    
  FILE data_jem12:  TEXT open READ_MODE is "../../Jet_common/trunk/data/test12.txt";    
  FILE data_jem13:  TEXT open READ_MODE is "../../Jet_common/trunk/data/test13.txt";    
  FILE data_jem14:  TEXT open READ_MODE is "../../Jet_common/trunk/data/test14.txt";    
  FILE data_jem15:  TEXT open READ_MODE is "../../Jet_common/trunk/data/test15.txt";    


  SHARED VARIABLE fileline_jem0       : LINE;
  SHARED VARIABLE fileline_jem1       : LINE;
  SHARED VARIABLE fileline_jem2       : LINE;
  SHARED VARIABLE fileline_jem3       : LINE;
  SHARED VARIABLE fileline_jem4       : LINE;
  SHARED VARIABLE fileline_jem5       : LINE;
  SHARED VARIABLE fileline_jem6       : LINE;
  SHARED VARIABLE fileline_jem7       : LINE;
  SHARED VARIABLE fileline_jem8       : LINE;
  SHARED VARIABLE fileline_jem9       : LINE;
  SHARED VARIABLE fileline_jem10      : LINE;
  SHARED VARIABLE fileline_jem11      : LINE;   
  SHARED VARIABLE fileline_jem12      : LINE;   
  SHARED VARIABLE fileline_jem13      : LINE;   
  SHARED VARIABLE fileline_jem14      : LINE;   
  SHARED VARIABLE fileline_jem15      : LINE;   

  
  SHARED VARIABLE trigsave            : LINE;
  SHARED VARIABLE memstring           : string(23 downto 1);
  SHARED VARIABLE memint               : integer;
  type mystring is array(15 downto 0) of string(24 downto 1); --always counts from one
  SHARED VARIABLE dstring          : mystring;
  
  
  -- Clock period definitions
  constant PERIOD_USR_CLK : time := 12.5 ns;
  constant DUTY_CYCLE  : real := 0.5;
  constant OFFSET      : time := 0 ns;
  constant zero         : std_logic :='0';
  signal zeros        : std_logic_vector(15 downto 0) := (others => '0');
  signal P  :  mat_var (numactchan-1 downto 0):=(others => (others => '0'));
  signal L1A : std_logic;

  component CMX_top_Base is
    port (

      ----------------------------------------------------------------------------
      -- VME-- backplane (65 signals)
      ----------------------------------------------------------------------------
      --GEOADDR0: in    std_logic;                     -- GeoAddr0
      OCB_GEO_ADRS_0:                     in    std_logic;
      --VMEADDR:  in    std_logic_vector(23 downto 1); -- Address bus   
      OCB_A01:                            in    std_logic;
      OCB_A02:                            in    std_logic;
      OCB_A03:                            in    std_logic;
      OCB_A04:                            in    std_logic;              
      OCB_A05:                            in    std_logic;
      OCB_A06:                            in    std_logic;
      OCB_A07:                            in    std_logic;
      OCB_A08:                            in    std_logic;
      OCB_A09:                            in    std_logic;
      OCB_A10:                            in    std_logic;
      OCB_A11:                            in    std_logic;
      OCB_A12:                            in    std_logic;
      OCB_A13:                            in    std_logic;
      OCB_A14:                            in    std_logic; 
      OCB_A15:                            in    std_logic;
      OCB_A16:                            in    std_logic;
      OCB_A17:                            in    std_logic;
      OCB_A18:                            in    std_logic;
      OCB_A19:                            in    std_logic;
      OCB_A20:                            in    std_logic;
      OCB_A21:                            in    std_logic;
      OCB_A22:                            in    std_logic;   
      OCB_A23:                            in    std_logic;
      --VMEDS_L:  in    std_logic;                     -- DS strobe     VMEDS_L
      OCB_DS_B:                          in    std_logic;
      --VMEWR_L:  in    std_logic;                     -- VME Write     VMEWR_L
      OCB_WRITE_B:                        in    std_logic; 
      --VMERST_L: in    std_logic;                     -- System reset  VMERST_L
      OCB_SYS_RESET_B:                    in    std_logic;       
      --VMEDATA:  inout std_logic_vector(15 downto 0); -- Data bus      VMEDATA
      OCB_D:                            inout std_logic_vector(15 downto 0);
      ----------------------------------------------------------------------------
      
      
      P0_0       : in std_logic;
      P0_1       : in std_logic;
      P0_2       : in std_logic;
      P0_3       : in std_logic;
      P0_4       : in std_logic;
      P0_5       : in std_logic;
      P0_6       : in std_logic;
      P0_7       : in std_logic;
      P0_8       : in std_logic;
      P0_9       : in std_logic;
      P0_10       : in std_logic;
      P0_11       : in std_logic;
      P0_12       : in std_logic;
      P0_13       : in std_logic;
      P0_14       : in std_logic;
      P0_15       : in std_logic;
      P0_16       : in std_logic;
      P0_17       : in std_logic;
      P0_18       : in std_logic;
      P0_19       : in std_logic;
      P0_20       : in std_logic;
      P0_21       : in std_logic;
      P0_22       : in std_logic;
      P0_23       : in std_logic;
      P0_24       : in std_logic;
      P1_0       : in std_logic;
      P1_1       : in std_logic;
      P1_2       : in std_logic;
      P1_3       : in std_logic;
      P1_4       : in std_logic;
      P1_5       : in std_logic;
      P1_6       : in std_logic;
      P1_7       : in std_logic;
      P1_8       : in std_logic;
      P1_9       : in std_logic;
      P1_10       : in std_logic;
      P1_11       : in std_logic;
      P1_12       : in std_logic;
      P1_13       : in std_logic;
      P1_14       : in std_logic;
      P1_15       : in std_logic;
      P1_16       : in std_logic;
      P1_17       : in std_logic;
      P1_18       : in std_logic;
      P1_19       : in std_logic;
      P1_20       : in std_logic;
      P1_21       : in std_logic;
      P1_22       : in std_logic;
      P1_23       : in std_logic;
      P1_24       : in std_logic;
      P2_0       : in std_logic;
      P2_1       : in std_logic;
      P2_2       : in std_logic;
      P2_3       : in std_logic;
      P2_4       : in std_logic;
      P2_5       : in std_logic;
      P2_6       : in std_logic;
      P2_7       : in std_logic;
      P2_8       : in std_logic;
      P2_9       : in std_logic;
      P2_10       : in std_logic;
      P2_11       : in std_logic;
      P2_12       : in std_logic;
      P2_13       : in std_logic;
      P2_14       : in std_logic;
      P2_15       : in std_logic;
      P2_16       : in std_logic;
      P2_17       : in std_logic;
      P2_18       : in std_logic;
      P2_19       : in std_logic;
      P2_20       : in std_logic;
      P2_21       : in std_logic;
      P2_22       : in std_logic;
      P2_23       : in std_logic;
      P2_24       : in std_logic;
      P3_0       : in std_logic;
      P3_1       : in std_logic;
      P3_2       : in std_logic;
      P3_3       : in std_logic;
      P3_4       : in std_logic;
      P3_5       : in std_logic;
      P3_6       : in std_logic;
      P3_7       : in std_logic;
      P3_8       : in std_logic;
      P3_9       : in std_logic;
      P3_10       : in std_logic;
      P3_11       : in std_logic;
      P3_12       : in std_logic;
      P3_13       : in std_logic;
      P3_14       : in std_logic;
      P3_15       : in std_logic;
      P3_16       : in std_logic;
      P3_17       : in std_logic;
      P3_18       : in std_logic;
      P3_19       : in std_logic;
      P3_20       : in std_logic;
      P3_21       : in std_logic;
      P3_22       : in std_logic;
      P3_23       : in std_logic;
      P3_24       : in std_logic;
      P4_0       : in std_logic;
      P4_1       : in std_logic;
      P4_2       : in std_logic;
      P4_3       : in std_logic;
      P4_4       : in std_logic;
      P4_5       : in std_logic;
      P4_6       : in std_logic;
      P4_7       : in std_logic;
      P4_8       : in std_logic;
      P4_9       : in std_logic;
      P4_10       : in std_logic;
      P4_11       : in std_logic;
      P4_12       : in std_logic;
      P4_13       : in std_logic;
      P4_14       : in std_logic;
      P4_15       : in std_logic;
      P4_16       : in std_logic;
      P4_17       : in std_logic;
      P4_18       : in std_logic;
      P4_19       : in std_logic;
      P4_20       : in std_logic;
      P4_21       : in std_logic;
      P4_22       : in std_logic;
      P4_23       : in std_logic;
      P4_24       : in std_logic;
      P5_0       : in std_logic;
      P5_1       : in std_logic;
      P5_2       : in std_logic;
      P5_3       : in std_logic;
      P5_4       : in std_logic;
      P5_5       : in std_logic;
      P5_6       : in std_logic;
      P5_7       : in std_logic;
      P5_8       : in std_logic;
      P5_9       : in std_logic;
      P5_10       : in std_logic;
      P5_11       : in std_logic;
      P5_12       : in std_logic;
      P5_13       : in std_logic;
      P5_14       : in std_logic;
      P5_15       : in std_logic;
      P5_16       : in std_logic;
      P5_17       : in std_logic;
      P5_18       : in std_logic;
      P5_19       : in std_logic;
      P5_20       : in std_logic;
      P5_21       : in std_logic;
      P5_22       : in std_logic;
      P5_23       : in std_logic;
      P5_24       : in std_logic;
      P6_0       : in std_logic;
      P6_1       : in std_logic;
      P6_2       : in std_logic;
      P6_3       : in std_logic;
      P6_4       : in std_logic;
      P6_5       : in std_logic;
      P6_6       : in std_logic;
      P6_7       : in std_logic;
      P6_8       : in std_logic;
      P6_9       : in std_logic;
      P6_10       : in std_logic;
      P6_11       : in std_logic;
      P6_12       : in std_logic;
      P6_13       : in std_logic;
      P6_14       : in std_logic;
      P6_15       : in std_logic;
      P6_16       : in std_logic;
      P6_17       : in std_logic;
      P6_18       : in std_logic;
      P6_19       : in std_logic;
      P6_20       : in std_logic;
      P6_21       : in std_logic;
      P6_22       : in std_logic;
      P6_23       : in std_logic;
      P6_24       : in std_logic;
      P7_0       : in std_logic;
      P7_1       : in std_logic;
      P7_2       : in std_logic;
      P7_3       : in std_logic;
      P7_4       : in std_logic;
      P7_5       : in std_logic;
      P7_6       : in std_logic;
      P7_7       : in std_logic;
      P7_8       : in std_logic;
      P7_9       : in std_logic;
      P7_10       : in std_logic;
      P7_11       : in std_logic;
      P7_12       : in std_logic;
      P7_13       : in std_logic;
      P7_14       : in std_logic;
      P7_15       : in std_logic;
      P7_16       : in std_logic;
      P7_17       : in std_logic;
      P7_18       : in std_logic;
      P7_19       : in std_logic;
      P7_20       : in std_logic;
      P7_21       : in std_logic;
      P7_22       : in std_logic;
      P7_23       : in std_logic;
      P7_24       : in std_logic;
      P8_0       : in std_logic;
      P8_1       : in std_logic;
      P8_2       : in std_logic;
      P8_3       : in std_logic;
      P8_4       : in std_logic;
      P8_5       : in std_logic;
      P8_6       : in std_logic;
      P8_7       : in std_logic;
      P8_8       : in std_logic;
      P8_9       : in std_logic;
      P8_10       : in std_logic;
      P8_11       : in std_logic;
      P8_12       : in std_logic;
      P8_13       : in std_logic;
      P8_14       : in std_logic;
      P8_15       : in std_logic;
      P8_16       : in std_logic;
      P8_17       : in std_logic;
      P8_18       : in std_logic;
      P8_19       : in std_logic;
      P8_20       : in std_logic;
      P8_21       : in std_logic;
      P8_22       : in std_logic;
      P8_23       : in std_logic;
      P8_24       : in std_logic;
      P9_0       : in std_logic;
      P9_1       : in std_logic;
      P9_2       : in std_logic;
      P9_3       : in std_logic;
      P9_4       : in std_logic;
      P9_5       : in std_logic;
      P9_6       : in std_logic;
      P9_7       : in std_logic;
      P9_8       : in std_logic;
      P9_9       : in std_logic;
      P9_10       : in std_logic;
      P9_11       : in std_logic;
      P9_12       : in std_logic;
      P9_13       : in std_logic;
      P9_14       : in std_logic;
      P9_15       : in std_logic;
      P9_16       : in std_logic;
      P9_17       : in std_logic;
      P9_18       : in std_logic;
      P9_19       : in std_logic;
      P9_20       : in std_logic;
      P9_21       : in std_logic;
      P9_22       : in std_logic;
      P9_23       : in std_logic;
      P9_24       : in std_logic;
      P10_0       : in std_logic;
      P10_1       : in std_logic;
      P10_2       : in std_logic;
      P10_3       : in std_logic;
      P10_4       : in std_logic;
      P10_5       : in std_logic;
      P10_6       : in std_logic;
      P10_7       : in std_logic;
      P10_8       : in std_logic;
      P10_9       : in std_logic;
      P10_10       : in std_logic;
      P10_11       : in std_logic;
      P10_12       : in std_logic;
      P10_13       : in std_logic;
      P10_14       : in std_logic;
      P10_15       : in std_logic;
      P10_16       : in std_logic;
      P10_17       : in std_logic;
      P10_18       : in std_logic;
      P10_19       : in std_logic;
      P10_20       : in std_logic;
      P10_21       : in std_logic;
      P10_22       : in std_logic;
      P10_23       : in std_logic;
      P10_24       : in std_logic;
      P11_0       : in std_logic;
      P11_1       : in std_logic;
      P11_2       : in std_logic;
      P11_3       : in std_logic;
      P11_4       : in std_logic;
      P11_5       : in std_logic;
      P11_6       : in std_logic;
      P11_7       : in std_logic;
      P11_8       : in std_logic;
      P11_9       : in std_logic;
      P11_10       : in std_logic;
      P11_11       : in std_logic;
      P11_12       : in std_logic;
      P11_13       : in std_logic;
      P11_14       : in std_logic;
      P11_15       : in std_logic;
      P11_16       : in std_logic;
      P11_17       : in std_logic;
      P11_18       : in std_logic;
      P11_19       : in std_logic;
      P11_20       : in std_logic;
      P11_21       : in std_logic;
      P11_22       : in std_logic;
      P11_23       : in std_logic;
      P11_24       : in std_logic;
      P12_0       : in std_logic;
      P12_1       : in std_logic;
      P12_2       : in std_logic;
      P12_3       : in std_logic;
      P12_4       : in std_logic;
      P12_5       : in std_logic;
      P12_6       : in std_logic;
      P12_7       : in std_logic;
      P12_8       : in std_logic;
      P12_9       : in std_logic;
      P12_10       : in std_logic;
      P12_11       : in std_logic;
      P12_12       : in std_logic;
      P12_13       : in std_logic;
      P12_14       : in std_logic;
      P12_15       : in std_logic;
      P12_16       : in std_logic;
      P12_17       : in std_logic;
      P12_18       : in std_logic;
      P12_19       : in std_logic;
      P12_20       : in std_logic;
      P12_21       : in std_logic;
      P12_22       : in std_logic;
      P12_23       : in std_logic;
      P12_24       : in std_logic;
      P13_0       : in std_logic;
      P13_1       : in std_logic;
      P13_2       : in std_logic;
      P13_3       : in std_logic;
      P13_4       : in std_logic;
      P13_5       : in std_logic;
      P13_6       : in std_logic;
      P13_7       : in std_logic;
      P13_8       : in std_logic;
      P13_9       : in std_logic;
      P13_10       : in std_logic;
      P13_11       : in std_logic;
      P13_12       : in std_logic;
      P13_13       : in std_logic;
      P13_14       : in std_logic;
      P13_15       : in std_logic;
      P13_16       : in std_logic;
      P13_17       : in std_logic;
      P13_18       : in std_logic;
      P13_19       : in std_logic;
      P13_20       : in std_logic;
      P13_21       : in std_logic;
      P13_22       : in std_logic;
      P13_23       : in std_logic;
      P13_24       : in std_logic;
      P14_0       : in std_logic;
      P14_1       : in std_logic;
      P14_2       : in std_logic;
      P14_3       : in std_logic;
      P14_4       : in std_logic;
      P14_5       : in std_logic;
      P14_6       : in std_logic;
      P14_7       : in std_logic;
      P14_8       : in std_logic;
      P14_9       : in std_logic;
      P14_10       : in std_logic;
      P14_11       : in std_logic;
      P14_12       : in std_logic;
      P14_13       : in std_logic;
      P14_14       : in std_logic;
      P14_15       : in std_logic;
      P14_16       : in std_logic;
      P14_17       : in std_logic;
      P14_18       : in std_logic;
      P14_19       : in std_logic;
      P14_20       : in std_logic;
      P14_21       : in std_logic;
      P14_22       : in std_logic;
      P14_23       : in std_logic;
      P14_24       : in std_logic;
      P15_0       : in std_logic;
      P15_1       : in std_logic;
      P15_2       : in std_logic;
      P15_3       : in std_logic;
      P15_4       : in std_logic;
      P15_5       : in std_logic;
      P15_6       : in std_logic;
      P15_7       : in std_logic;
      P15_8       : in std_logic;
      P15_9       : in std_logic;
      P15_10       : in std_logic;
      P15_11       : in std_logic;
      P15_12       : in std_logic;
      P15_13       : in std_logic;
      P15_14       : in std_logic;
      P15_15       : in std_logic;
      P15_16       : in std_logic;
      P15_17       : in std_logic;
      P15_18       : in std_logic;
      P15_19       : in std_logic;
      P15_20       : in std_logic;
      P15_21       : in std_logic;
      P15_22       : in std_logic;
      P15_23       : in std_logic;
      P15_24       : in std_logic;

      
      --CLK_40MHz08_DSKW_2_BF_LOGIC_DIR : in std_logic;
      --CLK_40MHz08_DSKW_2_BF_LOGIC_CMP : in std_logic;

      CLK_40MHz08_DSKW_1_BF_LOGIC_DIR : in std_logic;
      CLK_40MHz08_DSKW_1_BF_LOGIC_CMP : in std_logic;

      --CLK_320MHz64_LHC_BF_LOGIC_DIR : in std_logic; 
      --CLK_320MHz64_LHC_BF_LOGIC_CMP : in std_logic;

      BF_DEBUG_0 : out std_logic;
      BF_DEBUG_1 : out std_logic;
      BF_DEBUG_2 : out std_logic;
      BF_DEBUG_3 : out std_logic;
      BF_DEBUG_4 : out std_logic;
      BF_DEBUG_5 : out std_logic;
      BF_DEBUG_6 : out std_logic;
      BF_DEBUG_7 : out std_logic;
      BF_DEBUG_8 : out std_logic;
      BF_DEBUG_9 : out std_logic;
      

      BF_REQ_CTP_1_INPUT  : out std_logic;
      BF_REQ_CTP_2_INPUT  : out std_logic;
      BF_REQ_CABLE_1_INPUT: out std_logic;
      BF_REQ_CABLE_2_INPUT: out std_logic;
      BF_REQ_CABLE_3_INPUT: out std_logic;
      BF_LED_REQ_0        : out std_logic;
      BF_LED_REQ_1        : out std_logic;
      BF_LED_REQ_2        : out std_logic;
      BF_LED_REQ_3        : out std_logic;
      BF_LED_REQ_4        : out std_logic;
      BF_TO_FROM_BSPT_0   : out std_logic;
      BF_TO_FROM_BSPT_1   : out std_logic;
      BF_TO_FROM_BSPT_2   : out std_logic;
      BF_TO_FROM_BSPT_3   : out std_logic;
      BF_TO_FROM_BSPT_4   : out std_logic;
      BF_TO_FROM_BSPT_5   : out std_logic;
      BF_TO_FROM_BSPT_6   : out std_logic;
      BF_TO_FROM_BSPT_7   : out std_logic;


      BF_DOUT_CTP_00 : out std_logic;
      BF_DOUT_CTP_01 : out std_logic;
      BF_DOUT_CTP_02 : out std_logic;
      BF_DOUT_CTP_03 : out std_logic;
      BF_DOUT_CTP_04 : out std_logic;
      BF_DOUT_CTP_05 : out std_logic;
      BF_DOUT_CTP_06 : out std_logic;
      BF_DOUT_CTP_07 : out std_logic;
      BF_DOUT_CTP_08 : out std_logic;
      BF_DOUT_CTP_09 : out std_logic;
      BF_DOUT_CTP_10 : out std_logic;
      BF_DOUT_CTP_11 : out std_logic;
      BF_DOUT_CTP_12 : out std_logic;
      BF_DOUT_CTP_13 : out std_logic;
      BF_DOUT_CTP_14 : out std_logic;
      BF_DOUT_CTP_15 : out std_logic;
      BF_DOUT_CTP_16 : out std_logic;
      BF_DOUT_CTP_17 : out std_logic;
      BF_DOUT_CTP_18 : out std_logic;
      BF_DOUT_CTP_19 : out std_logic;
      BF_DOUT_CTP_20 : out std_logic;
      BF_DOUT_CTP_21 : out std_logic;
      BF_DOUT_CTP_22 : out std_logic;
      BF_DOUT_CTP_23 : out std_logic;
      BF_DOUT_CTP_24 : out std_logic;
      BF_DOUT_CTP_25 : out std_logic;
      BF_DOUT_CTP_26 : out std_logic;
      BF_DOUT_CTP_27 : out std_logic;
      BF_DOUT_CTP_28 : out std_logic;
      BF_DOUT_CTP_29 : out std_logic;
      BF_DOUT_CTP_30 : out std_logic;
      BF_DOUT_CTP_31 : out std_logic;
      BF_DOUT_CTP_64 : out std_logic;
      
      BF_DOUT_CTP_32 : out std_logic;
      BF_DOUT_CTP_33 : out std_logic;
      BF_DOUT_CTP_34 : out std_logic;
      BF_DOUT_CTP_35 : out std_logic;
      BF_DOUT_CTP_36 : out std_logic;
      BF_DOUT_CTP_37 : out std_logic;
      BF_DOUT_CTP_38 : out std_logic;
      BF_DOUT_CTP_39 : out std_logic;
      BF_DOUT_CTP_40 : out std_logic;
      BF_DOUT_CTP_41 : out std_logic;
      BF_DOUT_CTP_42 : out std_logic;
      BF_DOUT_CTP_43 : out std_logic;
      BF_DOUT_CTP_44 : out std_logic;
      BF_DOUT_CTP_45 : out std_logic;
      BF_DOUT_CTP_46 : out std_logic;
      BF_DOUT_CTP_47 : out std_logic;
      BF_DOUT_CTP_48 : out std_logic;
      BF_DOUT_CTP_49 : out std_logic;
      BF_DOUT_CTP_50 : out std_logic;
      BF_DOUT_CTP_51 : out std_logic;
      BF_DOUT_CTP_52 : out std_logic;
      BF_DOUT_CTP_53 : out std_logic;
      BF_DOUT_CTP_54 : out std_logic;
      BF_DOUT_CTP_55 : out std_logic;
      BF_DOUT_CTP_56 : out std_logic;
      BF_DOUT_CTP_57 : out std_logic;
      BF_DOUT_CTP_58 : out std_logic;
      BF_DOUT_CTP_59 : out std_logic;
      BF_DOUT_CTP_60 : out std_logic;
      BF_DOUT_CTP_61 : out std_logic;
      BF_DOUT_CTP_62 : out std_logic;
      BF_DOUT_CTP_63 : out std_logic;
      BF_DOUT_CTP_65 : out std_logic;

      D_CBL_00_B : out std_logic;
      D_CBL_01_B : out std_logic;
      D_CBL_02_B : out std_logic;
      D_CBL_03_B : out std_logic;
      D_CBL_04_B : out std_logic;
      D_CBL_05_B : out std_logic;
      D_CBL_06_B : out std_logic;
      D_CBL_07_B : out std_logic;
      D_CBL_08_B : out std_logic;
      D_CBL_09_B : out std_logic;
      D_CBL_10_B : out std_logic;
      D_CBL_11_B : out std_logic;
      D_CBL_12_B : out std_logic;
      D_CBL_13_B : out std_logic;
      D_CBL_14_B : out std_logic;
      D_CBL_15_B : out std_logic;
      D_CBL_16_B : out std_logic;
      D_CBL_17_B : out std_logic;
      D_CBL_18_B : out std_logic;
      D_CBL_19_B : out std_logic;
      D_CBL_20_B : out std_logic;
      D_CBL_21_B : out std_logic;
      D_CBL_22_B : out std_logic;
      D_CBL_23_B : out std_logic;
      D_CBL_24_B : out std_logic;
      D_CBL_25_B : out std_logic;
      D_CBL_26_B : out std_logic;
      D_CBL_81_B : out std_logic;
      
      D_CBL_27_B : out std_logic;
      D_CBL_28_B : out std_logic;
      D_CBL_29_B : out std_logic;
      D_CBL_30_B : out std_logic;
      D_CBL_31_B : out std_logic;
      D_CBL_32_B : out std_logic;
      D_CBL_33_B : out std_logic;
      D_CBL_34_B : out std_logic;
      D_CBL_35_B : out std_logic;
      D_CBL_36_B : out std_logic;
      D_CBL_37_B : out std_logic;
      D_CBL_38_B : out std_logic;
      D_CBL_39_B : out std_logic;
      D_CBL_40_B : out std_logic;
      D_CBL_41_B : out std_logic;
      D_CBL_42_B : out std_logic;
      D_CBL_43_B : out std_logic;
      D_CBL_44_B : out std_logic;
      D_CBL_45_B : out std_logic;
      D_CBL_46_B : out std_logic;
      D_CBL_47_B : out std_logic;
      D_CBL_48_B : out std_logic;
      D_CBL_49_B : out std_logic;
      D_CBL_50_B : out std_logic;
      D_CBL_51_B : out std_logic;
      D_CBL_52_B : out std_logic;
      D_CBL_53_B : out std_logic;
      D_CBL_82_B : out std_logic;

      D_CBL_54_B : out std_logic;
      D_CBL_55_B : out std_logic;
      D_CBL_56_B : out std_logic;
      D_CBL_57_B : out std_logic;
      D_CBL_58_B : out std_logic;
      D_CBL_59_B : out std_logic;
      D_CBL_60_B : out std_logic;
      D_CBL_61_B : out std_logic;
      D_CBL_62_B : out std_logic;
      D_CBL_63_B : out std_logic;
      D_CBL_64_B : out std_logic;
      D_CBL_65_B : out std_logic;
      D_CBL_66_B : out std_logic;
      D_CBL_67_B : out std_logic;
      D_CBL_68_B : out std_logic;
      D_CBL_69_B : out std_logic;
      D_CBL_70_B : out std_logic;
      D_CBL_71_B : out std_logic;
      D_CBL_72_B : out std_logic;
      D_CBL_73_B : out std_logic;
      D_CBL_74_B : out std_logic;
      D_CBL_75_B : out std_logic;
      D_CBL_76_B : out std_logic;
      D_CBL_77_B : out std_logic;
      D_CBL_78_B : out std_logic;
      D_CBL_79_B : out std_logic;
      D_CBL_80_B : out std_logic;
      D_CBL_83_B : out std_logic;

      BF_TO_TP_DAQ_SLINK_RETURN_DIR  : in std_logic;
      BF_TO_TP_DAQ_SLINK_RETURN_CMP  : in std_logic;
      BF_TO_TP_ROI_SLINK_RETURN_DIR  : in std_logic;
      BF_TO_TP_ROI_SLINK_RETURN_CMP  : in std_logic;

      BUF_TTC_L1_ACCEPT : in std_logic;
      BUF_TTC_BNCH_CNT_RES : in std_logic;
      
      CLK_120MHz000_XTAL_1_BF_TRNCV_DIR: in std_logic;
      CLK_120MHz000_XTAL_1_BF_TRNCV_CMP: in std_logic;
      BF_DAQ_DATA_OUT_DIR : out  std_logic;
      BF_DAQ_DATA_OUT_CMP : out  std_logic;
      BF_ROI_DATA_OUT_DIR : out  std_logic;
      BF_ROI_DATA_OUT_CMP : out  std_logic
      
      );

  end component;

  signal OCB_DS_B: std_logic;
  signal OCB_A: std_logic_vector(23 downto 0);
  signal OCB_D: std_logic_vector(15 downto 0);

  signal OCB_A_BOARD_ADDR: std_logic_vector(7 downto 0);
  signal OCB_A_LOCAL_ADDR: std_logic_vector(15 downto 0);
  
  --011 1000 0000 0010 1011 0001
  -- *2 = x700562

  signal BUF_TTC_BNCH_CNT_RES : std_logic;
  
BEGIN

  
  OCB_A(23 downto 16) <=OCB_A_BOARD_ADDR;
  OCB_A(15 downto 0)  <=OCB_A_LOCAL_ADDR;
  
  
  -- Instantiate the Unit Under Test (UUT)
  uut: CMX_top_Base PORT MAP (
    ----------------------------------------------------------------------------
    -- VME-- backplane (65 signals)
    ----------------------------------------------------------------------------
    OCB_GEO_ADRS_0     => zero,                  
    OCB_A01            => OCB_A(1),               
    OCB_A02            => OCB_A(2),                
    OCB_A03            => OCB_A(3),                
    OCB_A04            => OCB_A(4),   
    OCB_A05            => OCB_A(5),                
    OCB_A06            => OCB_A(6),                
    OCB_A07            => OCB_A(7),                
    OCB_A08            => OCB_A(8),
    OCB_A09            => OCB_A(9),                
    OCB_A10            => OCB_A(10),                
    OCB_A11            => OCB_A(11),                
    OCB_A12            => OCB_A(12),
    OCB_A13            => OCB_A(13),                
    OCB_A14            => OCB_A(14),                
    OCB_A15            => OCB_A(15),                
    OCB_A16            => OCB_A(16),
    OCB_A17            => OCB_A(17),                
    OCB_A18            => OCB_A(18),                
    OCB_A19            => OCB_A(19),                
    OCB_A20            => OCB_A(20),
    OCB_A21            => OCB_A(21),                
    OCB_A22            => OCB_A(22),                     
    OCB_A23            => OCB_A(23),
    OCB_DS_B            => OCB_DS_B,                 
    OCB_WRITE_B        => zero,                 
    OCB_SYS_RESET_B    => zero,                      
    OCB_D              => OCB_D,              
    ----------------------------------------------------------------------------
    
    
    P0_0               => P(0)(0),
    P0_1               => P(0)(1),
    P0_2               => P(0)(2),
    P0_3               => P(0)(3),
    P0_4               => P(0)(4),
    P0_5               => P(0)(5),
    P0_6               => P(0)(6),
    P0_7               => P(0)(7),
    P0_8               => P(0)(8),
    P0_9               => P(0)(9),
    P0_10              => P(0)(10),
    P0_11              => P(0)(11),
    P0_12              => P(0)(12),
    P0_13              => P(0)(13),
    P0_14              => P(0)(14),
    P0_15              => P(0)(15),
    P0_16              => P(0)(16),
    P0_17              => P(0)(17),
    P0_18              => P(0)(18),
    P0_19              => P(0)(19),
    P0_20              => P(0)(20),
    P0_21              => P(0)(21),
    P0_22              => P(0)(22),
    P0_23              => P(0)(23),
    P0_24              => P(0)(24),
    --
    P1_0               => P(1)(0),
    P1_1               => P(1)(1),
    P1_2               => P(1)(2),
    P1_3               => P(1)(3),
    P1_4               => P(1)(4),
    P1_5               => P(1)(5),
    P1_6               => P(1)(6),
    P1_7               => P(1)(7),
    P1_8               => P(1)(8),
    P1_9               => P(1)(9),
    P1_10              => P(1)(10),
    P1_11              => P(1)(11),
    P1_12              => P(1)(12),
    P1_13              => P(1)(13),
    P1_14              => P(1)(14),
    P1_15              => P(1)(15),
    P1_16              => P(1)(16),
    P1_17              => P(1)(17),
    P1_18              => P(1)(18),
    P1_19              => P(1)(19),
    P1_20              => P(1)(20),
    P1_21              => P(1)(21),
    P1_22              => P(1)(22),
    P1_23              => P(1)(23),
    P1_24              => P(1)(24),
    --
    P2_0               => P(2)(0),
    P2_1               => P(2)(1),
    P2_2               => P(2)(2),
    P2_3               => P(2)(3),
    P2_4               => P(2)(4),
    P2_5               => P(2)(5),
    P2_6               => P(2)(6),
    P2_7               => P(2)(7),
    P2_8               => P(2)(8),
    P2_9               => P(2)(9),
    P2_10              => P(2)(10),
    P2_11              => P(2)(11),
    P2_12              => P(2)(12),
    P2_13              => P(2)(13),
    P2_14              => P(2)(14),
    P2_15              => P(2)(15),
    P2_16              => P(2)(16),
    P2_17              => P(2)(17),
    P2_18              => P(2)(18),
    P2_19              => P(2)(19),
    P2_20              => P(2)(20),
    P2_21              => P(2)(21),
    P2_22              => P(2)(22),
    P2_23              => P(2)(23),
    P2_24              => P(2)(24),
    --
    P3_0               => P(3)(0),
    P3_1               => P(3)(1),
    P3_2               => P(3)(2),
    P3_3               => P(3)(3),
    P3_4               => P(3)(4),
    P3_5               => P(3)(5),
    P3_6               => P(3)(6),
    P3_7               => P(3)(7),
    P3_8               => P(3)(8),
    P3_9               => P(3)(9),
    P3_10              => P(3)(10),
    P3_11              => P(3)(11),
    P3_12              => P(3)(12),
    P3_13              => P(3)(13),
    P3_14              => P(3)(14),
    P3_15              => P(3)(15),
    P3_16              => P(3)(16),
    P3_17              => P(3)(17),
    P3_18              => P(3)(18),
    P3_19              => P(3)(19),
    P3_20              => P(3)(20),
    P3_21              => P(3)(21),
    P3_22              => P(3)(22),
    P3_23              => P(3)(23),
    P3_24              => P(3)(24),
    --
    P4_0               => P(4)(0),
    P4_1               => P(4)(1),
    P4_2               => P(4)(2),
    P4_3               => P(4)(3),
    P4_4               => P(4)(4),
    P4_5               => P(4)(5),
    P4_6               => P(4)(6),
    P4_7               => P(4)(7),
    P4_8               => P(4)(8),
    P4_9               => P(4)(9),
    P4_10              => P(4)(10),
    P4_11              => P(4)(11),
    P4_12              => P(4)(12),
    P4_13              => P(4)(13),
    P4_14              => P(4)(14),
    P4_15              => P(4)(15),
    P4_16              => P(4)(16),
    P4_17              => P(4)(17),
    P4_18              => P(4)(18),
    P4_19              => P(4)(19),
    P4_20              => P(4)(20),
    P4_21              => P(4)(21),
    P4_22              => P(4)(22),
    P4_23              => P(4)(23),
    P4_24              => P(4)(24),
    --
    P5_0               => P(5)(0),
    P5_1               => P(5)(1),
    P5_2               => P(5)(2),
    P5_3               => P(5)(3),
    P5_4               => P(5)(4),
    P5_5               => P(5)(5),
    P5_6               => P(5)(6),
    P5_7               => P(5)(7),
    P5_8               => P(5)(8),
    P5_9               => P(5)(9),
    P5_10              => P(5)(10),
    P5_11              => P(5)(11),
    P5_12              => P(5)(12),
    P5_13              => P(5)(13),
    P5_14              => P(5)(14),
    P5_15              => P(5)(15),
    P5_16              => P(5)(16),
    P5_17              => P(5)(17),
    P5_18              => P(5)(18),
    P5_19              => P(5)(19),
    P5_20              => P(5)(20),
    P5_21              => P(5)(21),
    P5_22              => P(5)(22),
    P5_23              => P(5)(23),
    P5_24              => P(5)(24),
    --
    P6_0               => P(6)(0),
    P6_1               => P(6)(1),
    P6_2               => P(6)(2),
    P6_3               => P(6)(3),
    P6_4               => P(6)(4),
    P6_5               => P(6)(5),
    P6_6               => P(6)(6),
    P6_7               => P(6)(7),
    P6_8               => P(6)(8),
    P6_9               => P(6)(9),
    P6_10              => P(6)(10),
    P6_11              => P(6)(11),
    P6_12              => P(6)(12),
    P6_13              => P(6)(13),
    P6_14              => P(6)(14),
    P6_15              => P(6)(15),
    P6_16              => P(6)(16),
    P6_17              => P(6)(17),
    P6_18              => P(6)(18),
    P6_19              => P(6)(19),
    P6_20              => P(6)(20),
    P6_21              => P(6)(21),
    P6_22              => P(6)(22),
    P6_23              => P(6)(23),
    P6_24              => P(6)(24), 
    --
    P7_0               => P(7)(0),
    P7_1               => P(7)(1),
    P7_2               => P(7)(2),
    P7_3               => P(7)(3),
    P7_4               => P(7)(4),
    P7_5               => P(7)(5),
    P7_6               => P(7)(6),
    P7_7               => P(7)(7),
    P7_8               => P(7)(8),
    P7_9               => P(7)(9),
    P7_10              => P(7)(10),
    P7_11              => P(7)(11),
    P7_12              => P(7)(12),
    P7_13              => P(7)(13),
    P7_14              => P(7)(14),
    P7_15              => P(7)(15),
    P7_16              => P(7)(16),
    P7_17              => P(7)(17),
    P7_18              => P(7)(18),
    P7_19              => P(7)(19),
    P7_20              => P(7)(20),
    P7_21              => P(7)(21),
    P7_22              => P(7)(22),
    P7_23              => P(7)(23),
    P7_24              => P(7)(24),
    --
    P8_0               => P(8)(0),
    P8_1               => P(8)(1),
    P8_2               => P(8)(2),
    P8_3               => P(8)(3),
    P8_4               => P(8)(4),
    P8_5               => P(8)(5),
    P8_6               => P(8)(6),
    P8_7               => P(8)(7),
    P8_8               => P(8)(8),
    P8_9               => P(8)(9),
    P8_10              => P(8)(10),
    P8_11              => P(8)(11),
    P8_12              => P(8)(12),
    P8_13              => P(8)(13),
    P8_14              => P(8)(14),
    P8_15              => P(8)(15),
    P8_16              => P(8)(16),
    P8_17              => P(8)(17),
    P8_18              => P(8)(18),
    P8_19              => P(8)(19),
    P8_20              => P(8)(20),
    P8_21              => P(8)(21),
    P8_22              => P(8)(22),
    P8_23              => P(8)(23),
    P8_24              => P(8)(24),
    --
    P9_0               => P(9)(0),
    P9_1               => P(9)(1),
    P9_2               => P(9)(2),
    P9_3               => P(9)(3),
    P9_4               => P(9)(4),
    P9_5               => P(9)(5),
    P9_6               => P(9)(6),
    P9_7               => P(9)(7),
    P9_8               => P(9)(8),
    P9_9               => P(9)(9),
    P9_10              => P(9)(10),
    P9_11              => P(9)(11),
    P9_12              => P(9)(12),
    P9_13              => P(9)(13),
    P9_14              => P(9)(14),
    P9_15              => P(9)(15),
    P9_16              => P(9)(16),
    P9_17              => P(9)(17),
    P9_18              => P(9)(18),
    P9_19              => P(9)(19),
    P9_20              => P(9)(20),
    P9_21              => P(9)(21),
    P9_22              => P(9)(22),
    P9_23              => P(9)(23),
    P9_24              => P(9)(24),
    --
    P10_0              => P(10)(0),
    P10_1              => P(10)(1),
    P10_2              => P(10)(2),
    P10_3              => P(10)(3),
    P10_4              => P(10)(4),
    P10_5              => P(10)(5),
    P10_6              => P(10)(6),
    P10_7              => P(10)(7),
    P10_8              => P(10)(8),
    P10_9              => P(10)(9),
    P10_10             => P(10)(10),
    P10_11             => P(10)(11),
    P10_12             => P(10)(12),
    P10_13             => P(10)(13),
    P10_14             => P(10)(14),
    P10_15             => P(10)(15),
    P10_16             => P(10)(16),
    P10_17             => P(10)(17),
    P10_18             => P(10)(18),
    P10_19             => P(10)(19),
    P10_20             => P(10)(20),
    P10_21             => P(10)(21),
    P10_22             => P(10)(22),
    P10_23             => P(10)(23),
    P10_24             => P(10)(24),
    --
    P11_0              => P(11)(0),
    P11_1              => P(11)(1),
    P11_2              => P(11)(2),
    P11_3              => P(11)(3),
    P11_4              => P(11)(4),
    P11_5              => P(11)(5),
    P11_6              => P(11)(6),
    P11_7              => P(11)(7),
    P11_8              => P(11)(8),
    P11_9              => P(11)(9),
    P11_10             => P(11)(10),
    P11_11             => P(11)(11),
    P11_12             => P(11)(12),
    P11_13             => P(11)(13),
    P11_14             => P(11)(14),
    P11_15             => P(11)(15),
    P11_16             => P(11)(16),
    P11_17             => P(11)(17),
    P11_18             => P(11)(18),
    P11_19             => P(11)(19),
    P11_20             => P(11)(20),
    P11_21             => P(11)(21),
    P11_22             => P(11)(22),
    P11_23             => P(11)(23),
    P11_24             => P(11)(24),
    --
    P12_0              => P(12)(0),
    P12_1              => P(12)(1),
    P12_2              => P(12)(2),
    P12_3              => P(12)(3),
    P12_4              => P(12)(4),
    P12_5              => P(12)(5),
    P12_6              => P(12)(6),
    P12_7              => P(12)(7),
    P12_8              => P(12)(8),
    P12_9              => P(12)(9),
    P12_10             => P(12)(10),
    P12_11             => P(12)(11),
    P12_12             => P(12)(12),
    P12_13             => P(12)(13),
    P12_14             => P(12)(14),
    P12_15             => P(12)(15),
    P12_16             => P(12)(16),
    P12_17             => P(12)(17),
    P12_18             => P(12)(18),
    P12_19             => P(12)(19),
    P12_20             => P(12)(20),
    P12_21             => P(12)(21),
    P12_22             => P(12)(22),
    P12_23             => P(12)(23),
    P12_24             => P(12)(24),
    --
    P13_0              => P(13)(0),
    P13_1              => P(13)(1),
    P13_2              => P(13)(2),
    P13_3              => P(13)(3),
    P13_4              => P(13)(4),
    P13_5              => P(13)(5),
    P13_6              => P(13)(6),
    P13_7              => P(13)(7),
    P13_8              => P(13)(8),
    P13_9              => P(13)(9),
    P13_10             => P(13)(10),
    P13_11             => P(13)(11),
    P13_12             => P(13)(12),
    P13_13             => P(13)(13),
    P13_14             => P(13)(14),
    P13_15             => P(13)(15),
    P13_16             => P(13)(16),
    P13_17             => P(13)(17),
    P13_18             => P(13)(18),
    P13_19             => P(13)(19),
    P13_20             => P(13)(20),
    P13_21             => P(13)(21),
    P13_22             => P(13)(22),
    P13_23             => P(13)(23),
    P13_24             => P(13)(24),
    --
    P14_0              => P(14)(0),
    P14_1              => P(14)(1),
    P14_2              => P(14)(2),
    P14_3              => P(14)(3),
    P14_4              => P(14)(4),
    P14_5              => P(14)(5),
    P14_6              => P(14)(6),
    P14_7              => P(14)(7),
    P14_8              => P(14)(8),
    P14_9              => P(14)(9),
    P14_10             => P(14)(10),
    P14_11             => P(14)(11),
    P14_12             => P(14)(12),
    P14_13             => P(14)(13),
    P14_14             => P(14)(14),
    P14_15             => P(14)(15),
    P14_16             => P(14)(16),
    P14_17             => P(14)(17),
    P14_18             => P(14)(18),
    P14_19             => P(14)(19),
    P14_20             => P(14)(20),
    P14_21             => P(14)(21),
    P14_22             => P(14)(22),
    P14_23             => P(14)(23),
    P14_24             => P(14)(24), 
    --
    P15_0              => P(15)(0),
    P15_1              => P(15)(1),
    P15_2              => P(15)(2),
    P15_3              => P(15)(3),
    P15_4              => P(15)(4),
    P15_5              => P(15)(5),
    P15_6              => P(15)(6),
    P15_7              => P(15)(7),
    P15_8              => P(15)(8),
    P15_9              => P(15)(9),
    P15_10             => P(15)(10),
    P15_11             => P(15)(11),
    P15_12             => P(15)(12),
    P15_13             => P(15)(13),
    P15_14             => P(15)(14),
    P15_15             => P(15)(15),
    P15_16             => P(15)(16),
    P15_17             => P(15)(17),
    P15_18             => P(15)(18),
    P15_19             => P(15)(19),
    P15_20             => P(15)(20),
    P15_21             => P(15)(21),
    P15_22             => P(15)(22),
    P15_23             => P(15)(23),
    P15_24             => P(15)(24), 
    --
    CLK_40MHz08_DSKW_1_BF_LOGIC_DIR  => CLK40_DIR,
    CLK_40MHz08_DSKW_1_BF_LOGIC_CMP  => CLK40_CMP,

    BF_DEBUG_0         =>  open,
    BF_DEBUG_1         =>  open,
    BF_DEBUG_2            =>  open,
    BF_DEBUG_3        =>  open,
    BF_DEBUG_4        =>  open,
    BF_DEBUG_5        =>  open,
    BF_DEBUG_6        =>  open,
    BF_DEBUG_7        =>  open,
    BF_DEBUG_8        =>  open,
    BF_DEBUG_9        =>  open,
    

    BF_REQ_CTP_1_INPUT     =>  open,
    BF_REQ_CTP_2_INPUT     =>  open,
    BF_REQ_CABLE_1_INPUT   =>  open,
    BF_REQ_CABLE_2_INPUT   =>  open,
    BF_REQ_CABLE_3_INPUT   =>  open,
    BF_LED_REQ_0           =>  open,
    BF_LED_REQ_1           =>  open,
    BF_LED_REQ_2           =>  open,
    BF_LED_REQ_3           =>  open,
    BF_LED_REQ_4           =>  open,
    BF_TO_FROM_BSPT_0      =>  open,
    BF_TO_FROM_BSPT_1      =>  open,
    BF_TO_FROM_BSPT_2      =>  open,
    BF_TO_FROM_BSPT_3      =>  open,
    BF_TO_FROM_BSPT_4      =>  open,
    BF_TO_FROM_BSPT_5      =>  open,
    BF_TO_FROM_BSPT_6      =>  open,
    BF_TO_FROM_BSPT_7      =>  open,


    BF_DOUT_CTP_00        =>  open,
    BF_DOUT_CTP_01        =>  open,
    BF_DOUT_CTP_02        =>  open,
    BF_DOUT_CTP_03         =>  open,
    BF_DOUT_CTP_04         =>  open,
    BF_DOUT_CTP_05         =>  open,
    BF_DOUT_CTP_06         =>  open,
    BF_DOUT_CTP_07         =>  open,
    BF_DOUT_CTP_08         =>  open,
    BF_DOUT_CTP_09         =>  open,
    BF_DOUT_CTP_10         =>  open,
    BF_DOUT_CTP_11         =>  open,
    BF_DOUT_CTP_12         =>  open,
    BF_DOUT_CTP_13         =>  open,
    BF_DOUT_CTP_14         =>  open,
    BF_DOUT_CTP_15         =>  open,
    BF_DOUT_CTP_16         =>  open,
    BF_DOUT_CTP_17         =>  open,
    BF_DOUT_CTP_18         =>  open,
    BF_DOUT_CTP_19         =>  open,
    BF_DOUT_CTP_20         =>  open,
    BF_DOUT_CTP_21         =>  open,
    BF_DOUT_CTP_22         =>  open,
    BF_DOUT_CTP_23         =>  open,
    BF_DOUT_CTP_24         =>  open,
    BF_DOUT_CTP_25         =>  open,
    BF_DOUT_CTP_26         =>  open,
    BF_DOUT_CTP_27         =>  open,
    BF_DOUT_CTP_28         =>  open,
    BF_DOUT_CTP_29         =>  open,
    BF_DOUT_CTP_30         =>  open,
    BF_DOUT_CTP_31         =>  open,
    BF_DOUT_CTP_64         =>  open,
    
    BF_DOUT_CTP_32        =>  open,
    BF_DOUT_CTP_33        =>  open,
    BF_DOUT_CTP_34        =>  open,
    BF_DOUT_CTP_35        =>  open,
    BF_DOUT_CTP_36        =>  open,
    BF_DOUT_CTP_37        =>  open,
    BF_DOUT_CTP_38        =>  open,
    BF_DOUT_CTP_39        =>  open,
    BF_DOUT_CTP_40        =>  open,
    BF_DOUT_CTP_41        =>  open,
    BF_DOUT_CTP_42        =>  open,
    BF_DOUT_CTP_43        =>  open,
    BF_DOUT_CTP_44        =>  open,
    BF_DOUT_CTP_45        =>  open,
    BF_DOUT_CTP_46         =>  open,
    BF_DOUT_CTP_47         =>  open,
    BF_DOUT_CTP_48         =>  open,
    BF_DOUT_CTP_49         =>  open,
    BF_DOUT_CTP_50         =>  open,
    BF_DOUT_CTP_51         =>  open,
    BF_DOUT_CTP_52         =>  open,
    BF_DOUT_CTP_53         =>  open,
    BF_DOUT_CTP_54         =>  open,
    BF_DOUT_CTP_55         =>  open,
    BF_DOUT_CTP_56         =>  open,
    BF_DOUT_CTP_57         =>  open,
    BF_DOUT_CTP_58         =>  open,
    BF_DOUT_CTP_59         =>  open,
    BF_DOUT_CTP_60         =>  open,
    BF_DOUT_CTP_61         =>  open,
    BF_DOUT_CTP_62         =>  open,
    BF_DOUT_CTP_63         =>  open,
    BF_DOUT_CTP_65         =>  open,

    D_CBL_00_B        =>  open,
    D_CBL_01_B        =>  open,
    D_CBL_02_B           =>  open,
    D_CBL_03_B           =>  open,
    D_CBL_04_B           =>  open,
    D_CBL_05_B           =>  open,
    D_CBL_06_B           =>  open,
    D_CBL_07_B           =>  open,
    D_CBL_08_B           =>  open,
    D_CBL_09_B           =>  open,
    D_CBL_10_B           =>  open,
    D_CBL_11_B           =>  open,
    D_CBL_12_B           =>  open,
    D_CBL_13_B           =>  open,
    D_CBL_14_B           =>  open,
    D_CBL_15_B           =>  open,
    D_CBL_16_B           =>  open,
    D_CBL_17_B           =>  open,
    D_CBL_18_B           =>  open,
    D_CBL_19_B           =>  open, 
    D_CBL_20_B           =>  open,
    D_CBL_21_B           =>  open,
    D_CBL_22_B           =>  open,
    D_CBL_23_B       =>  open,
    D_CBL_24_B           =>  open,
    D_CBL_25_B           =>  open,
    D_CBL_26_B           =>  open,
    D_CBL_81_B           =>  open,
    
    D_CBL_27_B       =>  open,
    D_CBL_28_B       =>  open,
    D_CBL_29_B       =>  open,
    D_CBL_30_B     =>  open,
    D_CBL_31_B         =>  open,
    D_CBL_32_B     =>  open,
    D_CBL_33_B     =>  open,
    D_CBL_34_B     =>  open,
    D_CBL_35_B     =>  open,
    D_CBL_36_B     =>  open,
    D_CBL_37_B     =>  open,
    D_CBL_38_B     =>  open,
    D_CBL_39_B       =>  open,
    D_CBL_40_B     =>  open,
    D_CBL_41_B       =>  open,
    D_CBL_42_B       =>  open,
    D_CBL_43_B       =>  open,
    D_CBL_44_B       =>  open,
    D_CBL_45_B       =>  open,
    D_CBL_46_B       =>  open,
    D_CBL_47_B       =>  open,
    D_CBL_48_B       =>  open,
    D_CBL_49_B       =>  open,
    D_CBL_50_B       =>  open,
    D_CBL_51_B       =>  open,
    D_CBL_52_B       =>  open,
    D_CBL_53_B       =>  open,
    D_CBL_82_B       =>  open,

    D_CBL_54_B     =>  open,
    D_CBL_55_B     =>  open,
    D_CBL_56_B     =>  open,
    D_CBL_57_B         =>  open,
    D_CBL_58_B     =>  open,
    D_CBL_59_B     =>  open,
    D_CBL_60_B     =>  open,
    D_CBL_61_B     =>  open,
    D_CBL_62_B     =>  open,
    D_CBL_63_B     =>  open,
    D_CBL_64_B     =>  open,
    D_CBL_65_B     =>  open,
    D_CBL_66_B     =>  open,
    D_CBL_67_B         =>  open,
    D_CBL_68_B     =>  open,
    D_CBL_69_B     =>  open,
    D_CBL_70_B     =>  open,
    D_CBL_71_B     =>  open,
    D_CBL_72_B     =>  open,
    D_CBL_73_B     =>  open,
    D_CBL_74_B     =>  open,
    D_CBL_75_B       =>  open,
    D_CBL_76_B     =>  open,
    D_CBL_77_B     =>  open,
    D_CBL_78_B     =>  open,
    D_CBL_79_B     =>  open,
    D_CBL_80_B     =>  open,
    D_CBL_83_B       =>  open,

    BF_TO_TP_DAQ_SLINK_RETURN_DIR   => zero,
    BF_TO_TP_DAQ_SLINK_RETURN_CMP   =>  zero,  
    BF_TO_TP_ROI_SLINK_RETURN_DIR   => zero,
    BF_TO_TP_ROI_SLINK_RETURN_CMP   => zero, 

    BUF_TTC_L1_ACCEPT      => L1A,
    BUF_TTC_BNCH_CNT_RES   => BUF_TTC_BNCH_CNT_RES,

    CLK_120MHz000_XTAL_1_BF_TRNCV_DIR => CLK_120MHz000_XTAL_1_BF_TRNCV_DIR,
    CLK_120MHz000_XTAL_1_BF_TRNCV_CMP => CLK_120MHz000_XTAL_1_BF_TRNCV_CMP,
    BF_DAQ_DATA_OUT_DIR  => open,
    BF_DAQ_DATA_OUT_CMP  => open,
    BF_ROI_DATA_OUT_DIR  => open,
    BF_ROI_DATA_OUT_CMP  => open
    
    );

  -- Clock process definitions
  clk_process_120 :process
  begin
    CLK_120MHz000_XTAL_1_BF_TRNCV_DIR <= '0';
    CLK_120MHz000_XTAL_1_BF_TRNCV_CMP <= '1';
    wait for clk120_period/2;
    CLK_120MHz000_XTAL_1_BF_TRNCV_DIR <= '1';
    CLK_120MHz000_XTAL_1_BF_TRNCV_CMP <= '0';
    wait for clk120_period/2;
  end process;


  -- Clock process definitions
  clk_process :process
  begin
    clk40_DIR <= '0';
    clk40_CMP <= '1';
    wait for clk40_DIR_period/2;
    clk40_DIR <= '1';
    clk40_CMP <= '0';
    wait for clk40_DIR_period/2;
  end process;


  -- Clock process definitions
  clk_process_160 :process
  begin
    WAIT for 3.125 ns;
    CLOCK_LOOP : LOOP
      clk160 <= '0';
      WAIT FOR clk160_period/2;
      clk160 <= '1';
      WAIT FOR clk160_period/2;
    END LOOP CLOCK_LOOP;
  end process;


  -- Clock process definitions
  clk_process_80 :process
  begin
    WAIT for 9.375 ns;
    CLOCK_LOOP : LOOP
      clk80 <= '0';
      WAIT FOR clk80_period/2;
      clk80 <= '1';
      WAIT FOR clk80_period/2;
    END LOOP CLOCK_LOOP;    
  end process;

  
  clock_gen: for i in 0 to 15 generate
    P(i)(24) <= clk80;
  end generate;

  --strobe for vme the fixed vme write so reset is '0'
  zeros<=(others=>'0');
  strobe_process: process
  begin
    
    OCB_DS_B<='1';
    OCB_A_BOARD_ADDR<=x"70";
    
    OCB_A_LOCAL_ADDR<=std_logic_vector(to_unsigned(ADDR_REG_RW_INPUT_MOD_RESET,16));
    OCB_D<=(others=>'0');
    wait for 500 ns;
    OCB_DS_B<='0';
    wait for 100 ns;
    OCB_DS_B<='1';
    wait for 100 ns;

    OCB_A_LOCAL_ADDR<=std_logic_vector(to_unsigned(ADDR_REG_RW_DAQ_SLICE,16));
    OCB_D<=(others=>'0');
    wait for 500 ns;
    OCB_DS_B<='0';
    wait for 100 ns;
    OCB_DS_B<='1';
    wait for 100 ns;
    
    OCB_A_LOCAL_ADDR<=std_logic_vector(to_unsigned(ADDR_REG_RW_DAQ_RAM_OFFSET,16));
    OCB_D<=std_logic_vector(to_unsigned(50,16));
    wait for 500 ns;
    OCB_DS_B<='0';
    wait for 100 ns;
    OCB_DS_B<='1';
    wait for 100 ns;

    OCB_A_LOCAL_ADDR<=std_logic_vector(to_unsigned(ADDR_REG_RW_BCID_RESET_VAL,16));
    OCB_D<=std_logic_vector(to_unsigned(350,16));
    wait for 500 ns;
    OCB_DS_B<='0';
    wait for 100 ns;
    OCB_DS_B<='1';
    wait for 100 ns;

    
    
    
    wait;
  end process strobe_process;
  
   -- Stimulus process
   stim_proc: process
   begin
     l1a<='0';
     BUF_TTC_BNCH_CNT_RES<='0';
     wait for 55000 ns;
     wait until rising_edge(clk40_DIR);
     BUF_TTC_BNCH_CNT_RES<='1';
     wait until rising_edge(clk40_DIR);
     BUF_TTC_BNCH_CNT_RES<='0';     
     wait for 500 ns;   
     wait until rising_edge(clk40_DIR);
     l1a <= '1';
     wait until rising_edge(clk40_DIR);
     l1a<='0';
     wait until rising_edge(clk40_DIR);
     wait until rising_edge(clk40_DIR);
     wait until rising_edge(clk40_DIR);
     wait until rising_edge(clk40_DIR);
     wait until rising_edge(clk40_DIR);
     wait until rising_edge(clk40_DIR);
     l1a <= '1';
     wait until rising_edge(clk40_DIR);
     l1a<='0';

     wait;
   end process stim_proc;
  
 --  Test Bench Statements, JEM0
   INPUT_JEM0:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
 
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem0)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem0,fileline_jem0);
       read(fileline_jem0,dstring(0));
       P(0)(23 downto  0) <= str_to_stdvec(dstring(0)(24 downto   1));
     end loop;   
     file_close(data_jem0);
     -- 
     wait; -- will wait forever  
   END PROCESS INPUT_JEM0;
   
 
 
 
 --  Test Bench Statements, JEM1
   INPUT_JEM1:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem1)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem1,fileline_jem1);
       read(fileline_jem1,dstring(1));
       P(1)(23 downto  0) <= str_to_stdvec(dstring(1)(24 downto   1));
     end loop;   
     file_close(data_jem1);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM1;
   
 
 --  Test Bench Statements, JEM2
   INPUT_JEM2:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem2)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem1,fileline_jem2);
       read(fileline_jem2,dstring(2));
       P(2)(23 downto  0) <= str_to_stdvec(dstring(2)(24 downto   1));
     end loop;   
     file_close(data_jem2);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM2;
   
 
 
 --  Test Bench Statements, JEM3
   INPUT_JEM3:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem3)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem3,fileline_jem3);
       read(fileline_jem3,dstring(3));
       P(3)(23 downto  0) <= str_to_stdvec(dstring(3)(24 downto   1));
     end loop;   
     file_close(data_jem3);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM3;
 
 
 --  Test Bench Statements, JEM4
   INPUT_JEM4:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem4)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem4,fileline_jem4);
       read(fileline_jem4,dstring(4));
       P(4)(23 downto  0) <= str_to_stdvec(dstring(4)(24 downto   1)); 
     end loop;   
     file_close(data_jem4);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM4;
 
 
 --  Test Bench Statements, JEM5
   INPUT_JEM5:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem5)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem5,fileline_jem5);
       read(fileline_jem5,dstring(5));
       P(5)(23 downto  0) <= str_to_stdvec(dstring(5)(24 downto   1)); 
     end loop;   
     file_close(data_jem5);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM5;
 
 
 --  Test Bench Statements, JEM6
   INPUT_JEM6:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem6)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem6,fileline_jem6);
       read(fileline_jem6,dstring(6));
       P(6)(23 downto  0) <= str_to_stdvec(dstring(6)(24 downto   1)); 
     end loop;   
     file_close(data_jem6);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM6;
   
 
 --  Test Bench Statements, JEM7
   INPUT_JEM7:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem7)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem7,fileline_jem7);
       read(fileline_jem7,dstring(7));
       P(7)(23 downto  0) <= str_to_stdvec(dstring(7)(24 downto   1));
     end loop;   
     file_close(data_jem7);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM7;
 
 
 --  Test Bench Statements, JEM8
   INPUT_JEM8:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem8)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem8,fileline_jem8);
       read(fileline_jem8,dstring(8));
       P(8)(23 downto  0) <= str_to_stdvec(dstring(8)(24 downto   1));
     end loop;   
     file_close(data_jem8);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM8;
 
 
 --  Test Bench Statements, JEM1
   INPUT_JEM9:
   PROCESS 
   BEGIN
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem9)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem9,fileline_jem9);
       read(fileline_jem9,dstring(9));
       P(9)(23 downto  0) <= str_to_stdvec(dstring(9)(24 downto   1));
     end loop;   
     file_close(data_jem9);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM9;
 
 
 --  Test Bench Statements, JEM10
   INPUT_JEM10:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem10)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem10,fileline_jem10);
       read(fileline_jem10,dstring(10));
       P(10)(23 downto  0) <= str_to_stdvec(dstring(10)(24 downto   1));
     end loop;   
     file_close(data_jem10);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM10;
 
 
 --  Test Bench Statements, JEM11
   INPUT_JEM11:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem11)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem11,fileline_jem11);
       read(fileline_jem11,dstring(11));
       P(11)(23 downto  0) <= str_to_stdvec(dstring(11)(24 downto   1));
     end loop;   
     file_close(data_jem11);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM11;
   
 
 --  Test Bench Statements, JEM1
   INPUT_JEM12:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem12)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem12,fileline_jem12);
       read(fileline_jem12,dstring(12));
       P(12)(23 downto  0) <= str_to_stdvec(dstring(12)(24 downto   1));
     end loop;   
     file_close(data_jem12);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM12;
   
 
 --  Test Bench Statements, JEM13
   INPUT_JEM13:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem13)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem13,fileline_jem13);
       read(fileline_jem13,dstring(13));
       P(13)(23 downto  0) <= str_to_stdvec(dstring(13)(24 downto   1));
     end loop;   
     file_close(data_jem13);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM13;
 
 --  Test Bench Statements, JEM14
   INPUT_JEM14:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem14)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem14,fileline_jem14);
       read(fileline_jem14,dstring(14));
       P(14)(23 downto  0) <= str_to_stdvec(dstring(14)(24 downto   1));
     end loop;   
     file_close(data_jem14);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM14;
   
 
 --  Test Bench Statements, JEM15
   INPUT_JEM15:
   PROCESS 
   BEGIN
     WAIT for 55000 ns;
     --
     -- Add user defined stimulus here
     while true -- not endfile(data_jem15)
     loop
       WAIT UNTIL (CLK160='1' AND CLK160'event);
       readline(data_jem15,fileline_jem15);
       read(fileline_jem15,dstring(15));
       P(15)(23 downto  0) <= str_to_stdvec(dstring(15)(24 downto   1));
     end loop;   
     file_close(data_jem15);
     -- 
     wait; -- will wait forever
   END PROCESS INPUT_JEM15;
  
  
--  End Test Bench 

END;


--      PROCESS    -- clock process for USR_CLK
--        BEGIN
--            WAIT for OFFSET;
--            CLOCK_LOOP : LOOP
--                USR_CLK <= '0';
--                WAIT FOR (PERIOD_USR_CLK - (PERIOD_USR_CLK * DUTY_CYCLE));
--                USR_CLK <= '1';
--                WAIT FOR (PERIOD_USR_CLK * DUTY_CYCLE);
--            END LOOP CLOCK_LOOP;
--        END PROCESS;


-- --   Trigger Output     
--      tb_trigout:
--      PROCESS(USR_CLK)
--        BEGIN   
--          if (USR_CLK='1' AND USR_CLK'EVENT) then 
--           if TRG_OUT='1' then
--              write(trigsave, HT);                     -- put the tab
--             write(trigsave,slv2int(EDEP(0,1)));
--               writeline(data_trig_out,trigsave);                  
--            end if;   
--          end if; 
--        END PROCESS tb_trigout;
--