20 USE ieee.std_logic_1164.
all;
35 clk : in T_SL;
-- clock
36 thresholds : in arr_16(max_jems*25*4-1 downto 0);
-- thresholds
37 datai : in arr_4Xword(max_jems-1 downto 0);
-- input data
38 din_cbl : in T_SLV65;
-- remote input (multiplicty)
40 dout_lcl : out (59 downto 0);
-- local multiplicity
42 dout : out T_SLV62;
-- global output data (multiplicity), including parity
44 dout_cbla_mux0 : out (33 downto 0);
-- cable output data (multiplicity), including parity
45 dout_cbla_mux1 : out (33 downto 0);
-- cable output data (multiplicity), including parity
46 dout_cblb_mux0 : out (33 downto 0);
-- cable output data (multiplicity), including parity
47 dout_cblb_mux1 : out (33 downto 0);
-- cable output data (multiplicity), including parity
56 -- parity error and quiet_force handling
57 par_err : in T_SLV2;
-- parity error (input module - 0, RTM - 1)
58 force : in T_SL;
-- force
70 -- Internal signal declarations
100 -- Component Declarations
105 clk :
in T_SL;
-- clock
106 thresholds :
in arr_16(max_jems*
25*
4-1 downto 0);
-- thresholds
107 datai :
in arr_4Xword(max_jems
-1 downto 0);
-- input data
108 dout_lcl :
out T_SLV60;
-- local output (multiplicity), excluding parity
111 force :
in T_SL;
-- force
112 disable_overflow_mask :
in (
15 downto 0)
116 signal disable_overflow_mask : (15 downto 0);
124 clk :
in T_SL;
-- clock
125 din_cbl :
in T_SLV65;
-- remote input (multiplicity)
126 din_cbl_ro :
in T_SL;
-- remote input (overflow)
127 din_lcl :
in T_SLV60;
-- local input (multiplicity), excluding parity
128 din_lcl_ro :
in T_SL;
-- local input (overflow)
129 dout :
out T_SLV62;
-- global output (mutliplicity) to CTP
130 dout_ro :
out T_SL;
-- global overflow
132 force :
in T_SL;
-- force
137 addr_vme :
in (
15 downto 0);
138 data_vme_in :
in (
15 downto 0);
139 data_vme_out :
out (
15 downto 0);
160 end component vme_local_switch;
164 flavor : T_SLV2 := "
00";
-- JET/CPM/SUMET
170 reset :
in ;
-- reset
174 end component adder_counter;
188 end component vme_outreg_notri_async;
190 signal data_from_vme_REG_RW_DISABLE_OVERFLOW_MASK : (15 downto 0);
191 signal data_to_vme_REG_RW_DISABLE_OVERFLOW_MASK : (15 downto 0);
215 disable_overflow_mask => disable_overflow_mask
257 -- correction: overflow bit added, in total 16 bits
290 -- Cable: Crate - System Output
306 -- ------------------------------------------------------------------------------------
307 -- MULT LOCAL COUNTERS - SYSTEM
308 -- ------------------------------------------------------------------------------------
310 gen_mult_counters_system: if gen_system = '1' generate
313 mult_2x16: for i in 0 to thresholds_num-1 generate
324 end generate mult_2x16;
347 VME_CNT_MULT_LOCAL_COUNTER_i: for i in 0 to (2*thresholds_num)-1 generate
351 ia_vme => ADDR_REG_RO_MULT_LOCAL_COUNTER+
(2*i
),
363 end generate VME_CNT_MULT_LOCAL_COUNTER_i;
365 -- ------------------------------------------------------------------------------------
366 -- MULT REMOTE COUNTERS
367 -- ------------------------------------------------------------------------------------
389 VME_CNT_MULT_REMOTE_COUNTER_i: for i in 0 to (2*thresholds_num)-1 generate
393 ia_vme => ADDR_REG_RO_MULT_REMOTE_COUNTER+
(2*i
),
405 end generate VME_CNT_MULT_REMOTE_COUNTER_i;
408 -- ------------------------------------------------------------------------------------
409 -- MULT TOTAL COUNTERS
410 -- ------------------------------------------------------------------------------------
412 -- The parity excluded.
435 VME_CNT_MULT_TOTAL_COUNTER_i: for i in 0 to (2*thresholds_num)-1 generate
439 ia_vme => ADDR_REG_RO_MULT_TOTAL_COUNTER+
(2*i
),
451 end generate VME_CNT_MULT_TOTAL_COUNTER_i;
454 end generate gen_mult_counters_system;
458 -- ------------------------------------------------------------------------------------
459 -- MULT LOCAL COUNTERS - CRATE
460 -- ------------------------------------------------------------------------------------
462 gen_mult_counters_crate: if gen_system = '0' generate
464 mult_2x16: for i in 0 to thresholds_num-1 generate
469 end generate mult_2x16;
489 VME_CNT_MULT_LOCAL_COUNTER_i: for i in 0 to (2*thresholds_num)-1 generate
493 ia_vme => ADDR_REG_RO_MULT_LOCAL_COUNTER+
(2*i
),
505 end generate VME_CNT_MULT_LOCAL_COUNTER_i;
508 end generate gen_mult_counters_crate;
514 ia_vme => ADDR_REG_RW_DISABLE_OVERFLOW_MASK,
525 data_to_vme => data_to_vme_REG_RW_DISABLE_OVERFLOW_MASK
);
527 data_to_vme_REG_RW_DISABLE_OVERFLOW_MASK<=data_from_vme_REG_RW_DISABLE_OVERFLOW_MASK;
528 disable_overflow_mask<=data_from_vme_REG_RW_DISABLE_OVERFLOW_MASK;
thresholds_numinteger :=25
cnt_mult_arr_2x16 ((2 * thresholds_num) - 1 downto 0) cnt_mult_total_2x16)
in addr_vmestd_logic_vector (15 downto 0)
std_logic_vector (33 downto 0) cblb_mux1
out data_vmestd_logic_vector (15 downto 0)
std_logic parity_cbla_mux1
out dout_cbla_mux0std_logic_vector (33 downto 0)
cnt_mult_arr (thresholds_num - 1 downto 0) cnt_mult_local
out dout_lclstd_logic_vector (59 downto 0)
arr_16 (12 * thresholds_num + 1 downto 0) data_vme_out_local)
out dout_cblb_mux0std_logic_vector (33 downto 0)
out data_from_vmestd_logic_vector (width - 1 downto 0)
T_SLV48 internal_dout_cnt
cnt_mult_arr_2x16 ((3 * 2 * thresholds_num) - 1 downto 0) cnt_mult_remote_2x16)
in data_vme_from_belowarr_16
--! inputs from local registers and from
cnt_mult_arr ((3 * thresholds_num) - 1 downto 0) cnt_mult_remote)
in data_vme_instd_logic_vector (15 downto 0)
in datastd_logic_vector (width - 1 downto 0)
gen_systemstd_logic :='1'
out data_vme_outstd_logic_vector (15 downto 0)
std_logic parity_cblb_mux1
out dout_cbla_mux1std_logic_vector (33 downto 0)
in data_to_vmestd_logic_vector (width - 1 downto 0)
out data_vme_upstd_logic_vector (15 downto 0)
--! connect this to
in addr_vmestd_logic_vector (15 downto 0)
cnt_mult_arr_2x16 ((2 * thresholds_num) - 1 downto 0) cnt_mult_local_2x16)
ADDR_REG_RW_PIPELINE_DELAY_LENGTHinteger :=0
out bus_drive_upstd_logic
or of all bus drive requests from below
std_logic_vector (33 downto 0) cbla_mux1
gen_systemstd_logic :='1'
std_logic parity_cbla_mux0
std_logic_vector (12 * thresholds_num + 1 downto 0) bus_drive_local)
out cnt_arrcnt_mult_arr (thresholds_num - 1 downto 0)
in dataiarr_4Xword (max_jems - 1 downto 0)
out data_vme_outstd_logic_vector (15 downto 0)
in dataiarr_4Xword (max_jems - 1 downto 0)
cnt_mult_arr (thresholds_num - 1 downto 0) cnt_mult_total
in dinstd_logic_vector (width - 1 downto 0)
std_logic parity_cblb_mux0
in thresholdsarr_16 (max_jems * 25 * 4 - 1 downto 0)
std_logic_vector (33 downto 0) cblb_mux0
std_logic_vector (33 downto 0) cbla_mux0
out dout_cblb_mux1std_logic_vector (33 downto 0)
in data_vme_instd_logic_vector (15 downto 0)
in data_to_vmestd_logic_vector (width - 1 downto 0)
in thresholdsarr_16 (max_jems * 25 * 4 - 1 downto 0)
in addr_vmestd_logic_vector (15 downto 0)
in bus_drive_from_belowstd_logic_vector
ADDR_REG_RW_PIPELINE_DELAY_LENGTHinteger :=0